32 bit read from AS8S512k32 sram ic

[priyap0]

I had a few doubts on this component.

Is there any application note for this IC. What is the recommended de coupling required? Is there any specifiec design/layout requriement? Any precautions to be taken while reading 32 bit data from the device?

Please help

 

[Harald Kapp]

All the technical data and timings you need are imho in the datasheet.

For decoupling use 100nF from Vcc to GND

 

[priyap0]

All the technical data and timings you need are imho in the datasheet.

For decoupling use 100nF from Vcc to GND

Thank you,
However, i have noticed that when performing 32 bit data read from this ram using FPGA, occasionally one byte is read as zero. That was why i wondered if there is any precaution to be taken when performing 32 bit read.

 

[(*steve*)]

Are there any precautions listed in the datasheet?

Are you sure you're not fudging any of the timings?

 

[(*steve*)]

I note that the datasheet seems to list separate timing for the first and subsequent reads