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528MHz clock level conversion

W

Winfield Hill

Jan 1, 1970
0
John Larkin wrote...
Heck, Win, a 3v p-p square wave at 600 MHz is just
getting interesting!

For you perhaps, John, but not for RobJ.
 
F

Fred Bloggs

Jan 1, 1970
0
John said:
Never miss an opportunity for an insult, huh Fred?

I guess everybody who ever uses chips with different I/O level specs
is an idiot.

John

It's not an insult, it is an observation that it is kind of dumb to set
a requirement that cannot be met by existing logic technology- somebody
was not thinking.
 
J

John Larkin

Jan 1, 1970
0
It's not an insult, it is an observation that it is kind of dumb to set
a requirement that cannot be met by existing logic technology- somebody
was not thinking.


Well, "You have mismanaged your component configuration" sounded sorta
personal to me. Last design we did - just shipped the first units a
couple weeks ago - we had more level shifter chips on the board than
logic chips.

John
 
F

Fred Bloggs

Jan 1, 1970
0
John said:
Well, "You have mismanaged your component configuration" sounded sorta
personal to me. Last design we did - just shipped the first units a
couple weeks ago - we had more level shifter chips on the board than
logic chips.

John

If Pericom doesn't make it, it doesn't exist. Besides, you're in left
field if this is a narrow band application- a simple LC does it-and with
zero bias current overhead.
 
J

John Larkin

Jan 1, 1970
0
If Pericom doesn't make it, it doesn't exist. Besides, you're in left
field if this is a narrow band application- a simple LC does it-and with
zero bias current overhead.


We're using the TI 74ALVC164245. Nice part... 16 bits in each
direction. Philips and IDT make it, too. Pericom may have an
equivalent, but their web site is so bad it's hard to tell.

Just when things were settling down, now we have to cope with lots of
different logic levels.

A tuned circuit might work, but it sounds like he may not have enough
power to drive the cmos with a passive matcher of some sort.

John
 
N

Nico Coesel

Jan 1, 1970
0
John Larkin said:
We're using the TI 74ALVC164245. Nice part... 16 bits in each
direction. Philips and IDT make it, too. Pericom may have an
equivalent, but their web site is so bad it's hard to tell.

Just when things were settling down, now we have to cope with lots of
different logic levels.

Isn't that something to sort out first? For the (space constrained)
design I'm working on now, one of the first things I did was
eliminating the need for logic level converters. Makes live a whole
lot easier.
 
J

John Larkin

Jan 1, 1970
0
Isn't that something to sort out first? For the (space constrained)
design I'm working on now, one of the first things I did was
eliminating the need for logic level converters. Makes live a whole
lot easier.


Fine if you can do it. My board has a VME interface (5 volts, high
current), a 5-volt microprocessor (the 3.3 volt version is too slow),
a huge Xilinx BGA (3.3 i/o, 1.8 core) and a lot of big static ram
(3.3, luckily). Plus a lot of fast DACs, clocks, a PLL, and sundry
stuff. You can't always buy everything at the same levels. I think the
next gen of FPGAs may only do 2.5 i/o.

John
 
R

RobJ

Jan 1, 1970
0
Nico said:
Isn't that something to sort out first? For the (space constrained)
design I'm working on now, one of the first things I did was
eliminating the need for logic level converters. Makes live a whole
lot easier.

One of the reasons I rarely post questions to forums like this is that most
people are so damn judgmental. Instead of getting pointed responses to a
pointed question you get a bunch of "Why the hell did you do this?" or "Any
idiot knows you can't do that ...", and a ton of "I would have done this
instead ...". Then I have to fight the urge to waste time trying to explain
myself, when I know that no explanation will appease the know-it-alls.
Thanks to John Larkin for giving me good ideas without questioning why I
need to do what I'm doing.

Rob
 
J

John Woodgate

Jan 1, 1970
0
<[email protected]>) about '528MHz clock level conversion',
One of the reasons I rarely post questions to forums like this is that most
people are so damn judgmental. Instead of getting pointed responses to a
pointed question you get a bunch of "Why the hell did you do this?" or "Any
idiot knows you can't do that ...", and a ton of "I would have done this
instead ...". Then I have to fight the urge to waste time trying to explain
myself, when I know that no explanation will appease the know-it-alls.
Thanks to John Larkin for giving me good ideas without questioning why I
need to do what I'm doing.
While there is some judgmental comment, I think some is more
constructive. To give a professional answer to a question, it is
advisable to know as much as possible about the problem, and initial
statements of problems are very often incomplete.

Besides, it's only human nature to ask, **sympathetically**, how you
came to paint yourself (or be painted by the management) into that
particular corner.
 
F

Fred Bloggs

Jan 1, 1970
0
RobJ said:
One of the reasons I rarely post questions to forums like this is that most
people are so damn judgmental. Instead of getting pointed responses to a
pointed question you get a bunch of "Why the hell did you do this?" or "Any
idiot knows you can't do that ...", and a ton of "I would have done this
instead ...". Then I have to fight the urge to waste time trying to explain
myself, when I know that no explanation will appease the know-it-alls.
Thanks to John Larkin for giving me good ideas without questioning why I
need to do what I'm doing.

Rob
His ideas are shit and you're an idiot.
 
J

John Larkin

Jan 1, 1970
0
His ideas are shit and you're an idiot.

Hey, Fred, how many new designs did you finish last year? And how much
did they sell for?

John
 
F

Fred Bloggs

Jan 1, 1970
0
John said:
Hey, Fred, how many new designs did you finish last year? And how much
did they sell for?

John

Hahah- every single one I was "forced" to work on. I don't work nearly
as hard as you do- there is no incentive, and sales are an irrelevant
consideration.
 
J

James Meyer

Jan 1, 1970
0
Besides, it's only human nature to ask, **sympathetically**, how you
came to paint yourself (or be painted by the management) into that
particular corner.

After pulling Joe out of the river where he was doing a passable
imitation of a boat anchor, Bill asked, "How'd you come to fall in?"

Joe replied, "I didn't come to fall in, I came to go fishing!"

Jim
 
N

Nico Coesel

Jan 1, 1970
0
John Larkin said:
Fine if you can do it. My board has a VME interface (5 volts, high
current), a 5-volt microprocessor (the 3.3 volt version is too slow),

What is too slow?
a huge Xilinx BGA (3.3 i/o, 1.8 core) and a lot of big static ram

You can have the Xilinx use different I/O levels for different banks
(groups of I/O lines).
(3.3, luckily). Plus a lot of fast DACs, clocks, a PLL, and sundry
stuff. You can't always buy everything at the same levels. I think the
next gen of FPGAs may only do 2.5 i/o.

Even the newer Xilinx devices like the spartan 3 can do I/O up to
3.3V.
 
N

Nico Coesel

Jan 1, 1970
0
RobJ said:
One of the reasons I rarely post questions to forums like this is that most
people are so damn judgmental. Instead of getting pointed responses to a
pointed question you get a bunch of "Why the hell did you do this?" or "Any
idiot knows you can't do that ...", and a ton of "I would have done this
instead ...". Then I have to fight the urge to waste time trying to explain
myself, when I know that no explanation will appease the know-it-alls.
Thanks to John Larkin for giving me good ideas without questioning why I
need to do what I'm doing.

The best answer to a question is asking why the question is raised in
the first place. Makes people think again about what they are doing,
hopefully from a different perspective.
 
K

keith

Jan 1, 1970
0
[snip]
This is a weird situation. Here's the history of how it got to this point.
The company I'm consulting for is developing a wireless chipset. They've
built a series of test chips over the last year to test various pieces of
their design, and my job is to do the board designs and some FPGA work. The
first test chip had 1.2V I/O. The Si4133 was already in the design when I
entered the picture, and I am not responsible for the RF parts of the
design. To get the 528MHz clock into the first test chip I used a very fast
diff-to-LVHSTL buffer from ICS that output a beautiful 1.2V single-ended
clock. But the rest of the 1.2V I/O (going to/from an FPGA) was a pain in
the ass.

On the next and two subsequent test chips the clock input became 3.3V
single-ended. I urged them to either go back to the 1.2V input or use a
differential input for the clock, but they've kept it at 3.3V. I'm not privy
to the reasons - I just have to make the boards work. I experimented with
some things on the last board that did not work out, so this time I want to
really solve the problem. I'm a digital guy and don't have a bag of analog
tricks to fall back on, but I've gotten some good ideas here that I'll look
into. Thanks to everyone who replied with suggestions.

Rob

Sounds like you are working for amateurs. Wireless chips, or chip
sets, don't use external clocks.

They use an external XTAL at (typically) 16MHz, and PLL the whole
she-bang.

Even on-chip, with no pin capacitances to drive, 500MHz is an upper
limit for CMOS. I usually use some form of PECL until I get down to
500MHz.

500MHz is the limit on internal CMOS circuits? Is that really what you
mean Jim?! We're better than that on external "busses" and some
decent multiple of that on internal logic, five or more levels deep.
....all CMOS.
 
R

Rich Grise

Jan 1, 1970
0
After pulling Joe out of the river where he was doing a passable
imitation of a boat anchor, Bill asked, "How'd you come to fall in?"

Joe replied, "I didn't come to fall in, I came to go fishing!"

There was a commotion in the machine shop. The foreman comes down, and
sees all the guys gathered 'round Simp O'Dell, who has just cut off his
finger on the power shears. "What's going on here?" barks the supervisor.
"Well, I'm not really sure", offers Simp. "I was just doing like this and
- Whoops! There goes another one!"

=:-O
Rich
 
I

Ian

Jan 1, 1970
0
John Larkin said:
Oh, scratch the LVDS receiver. I tried one and it gets weird above
about 300 MHz.

Opamp or MMIC, I guess.

John
I'm surprised you say that about LVDS - I've used FPGA LVDS
outputs at 600MHz with no problems. Waveform was very clean,
except for about 100psec timing difference between positive and
negative transitions.

If LVDS is not an option for the OP, then the MMIC suggestion
you made would be the simplest way - keep the impedance level
at 50 ohms, it makes things a lot easier, use controlled impedance
lines and make sure it is terminated properly.

Regards
Ian
 
J

John Larkin

Jan 1, 1970
0
I'm surprised you say that about LVDS - I've used FPGA LVDS
outputs at 600MHz with no problems. Waveform was very clean,
except for about 100psec timing difference between positive and
negative transitions.

No, his problem is that he needs a 3.3 volt clock at 600 MHz. I
suggested an LVDS-to-LVTTL converter. They act like comparators with
screaming fast edges, but the ones I tried wouldn't work well above
300. All-LVDS chips are a lot faster.

If LVDS is not an option for the OP, then the MMIC suggestion
you made would be the simplest way - keep the impedance level
at 50 ohms, it makes things a lot easier, use controlled impedance
lines and make sure it is terminated properly.

An ERA-5 will swing almost 3v p-p into an unterminated line, and over
4 if you shift the bias by pulling the input down a bit. Nice pulse
amp.


John
 
R

RobJ

Jan 1, 1970
0
Ian said:
I'm surprised you say that about LVDS - I've used FPGA LVDS
outputs at 600MHz with no problems. Waveform was very clean,
except for about 100psec timing difference between positive and
negative transitions.

Ian -

What FPGA family has that kind of LVDS output performance? Are you talking
about 600MHz clock or data outputs? Virtex-2 runs out of gas at around
400MHz for LVDS clock outputs (i.e., 800MHz data). I'd be really surprised
to hear that a Xilinx competitor can do 50% better than that.

Rob
 
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