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74LVT transition times: How low can you go?

J

Joerg

Jan 1, 1970
0
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three pages
short. Information about maximum transition times on inputs: Zilch.

In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.
 
J

John Larkin

Jan 1, 1970
0
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three pages
short. Information about maximum transition times on inputs: Zilch.

In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.

Sounds reasonable to me. Not a lot can go wrong here.

John
 
J

John F

Jan 1, 1970
0
Joerg said:
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three
pages
short. Information about maximum transition times on inputs: Zilch.

In an embedded application I need to slow down the /OE of a 74LVT244
so it turns tri-state fast but goes onto the bus slower, to avoid a
brief contention when addresses change. Is it ok for that family to
slow /OE by 200nsec or so via RC? It'll be the usual two resistor,
one diode and one cap deal. Want to avoid adding another Schmitt
here.

100mV/ns and 1/2 µs are specified.

I'd go with that solution.
 
J

Jim Granville

Jan 1, 1970
0
Joerg said:
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three pages
short. Information about maximum transition times on inputs: Zilch.

In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.

Hi Joerg,

Philips used to claim Schmitt Ips on these ? (well, the LVC series )
(but not everyone does..)

Their LVC244 data says this:
(as does the LVC2244A, which we have just used )

" Schmitt-trigger action at all inputs makes the circuit highly tolerant
for slower input rise and fall times." -


-jg
 
J

Joerg

Jan 1, 1970
0
Jim said:
Hi Joerg,

Philips used to claim Schmitt Ips on these ? (well, the LVC series )
(but not everyone does..)

Their LVC244 data says this:
(as does the LVC2244A, which we have just used )

" Schmitt-trigger action at all inputs makes the circuit highly tolerant
for slower input rise and fall times." -

Hmm, interesting, where did you find that?
 
V

Vladimir Vassilevsky

Jan 1, 1970
0
Joerg wrote:

In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.

You can make a delay using something like 1G97.
But the 200ns seems like an awful long time. Why would you need that?

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com
 
Y

Yuriy K.

Jan 1, 1970
0
Joerg said:
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three pages
short. Information about maximum transition times on inputs: Zilch.

http://www.google.com/search?hl=en&q=phillips+lvt&btnG=Google+Search

http://www.standardics.nxp.com/support/documents/logic/pdf/family.lvt.specification.pdf
....
RECOMMENDED OPERATING CONDITIONS
....
Dt/Dv Input transition rise or fall rate; Outputs enabled : <10 ns/V
....
In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.

Not according to specs.

http://www.standardics.nxp.com/products/lvt/pdf/74lvt2244.pdf
....
9. Recommended operating conditions:
....
Dt/DV input transition rise and fall rate; outputs enabled : <10 ns/V
 
C

CBFalconer

Jan 1, 1970
0
John said:
Sounds reasonable to me. Not a lot can go wrong here.

Is that a CMOS package? If so, slow transition times will
seriously increase the power consumption, and (if excessive) can
actually destroy the chip. The reason is that at intermediate
levels both the pull-up and pull-down components are on, and are
fighting each other.
 
J

Jim Thompson

Jan 1, 1970
0
Specsmanship seems to be on the decline. Philips/NXP is usually top
notch but the family guide for their LVT series is, gasp, three pages
short. Information about maximum transition times on inputs: Zilch.

In an embedded application I need to slow down the /OE of a 74LVT244 so
it turns tri-state fast but goes onto the bus slower, to avoid a brief
contention when addresses change. Is it ok for that family to slow /OE
by 200nsec or so via RC? It'll be the usual two resistor, one diode and
one cap deal. Want to avoid adding another Schmitt here.

Sure is a _crude_ way to get a timing delay. Why not do it right ?:)

...Jim Thompson
 
G

Genome

Jan 1, 1970
0
Joerg said:
Specsmanship seems to be on the decline. Philips/NXP is usually top notch
but the family guide for their LVT series is, gasp, three pages short.
Information about maximum transition times on inputs: Zilch.

This is standard practice when divisions of companies like Siemens or
Philips get sold off, broken up or reincarnated. Ultimately all the useful
data which you used to able to download as a single big book gets split up
into lots of little pieces that are then smeared about the new abortion of a
website and in the process a lot of it just disappears.

It's either job creation, stupidity or job creation for stupid people. The
final goal is to force you to contact an application stupid person using a
stupid web form that is invariably hidden behind a registration stupid web
form.

If you want the information you might try it but invariably you'll become

Mr Bum Bollocks
Bum Bollocks & Co Ltd
Bum Street
Bollockshampton

Just so you can say something like......

Re your p/n 123XYZ

I have just placed my order for 24,999,678 units with Not Your Company Ltd

Kindest ETC

Mr Bollocks
 
J

Joerg

Jan 1, 1970
0
Jim said:
Try page 2 of this
http://www.standardics.nxp.com/products/lvc/pdf/74lvc2244a.pdf

I think the LVC is the more modern family, with the LVT being phased
out ?

Are your sure the LVT is going? I am not too familiar with modern logic,
as an analog guy I usually get away with 74HC and CD4000.

Anyhow, this LVC driver doesn't look like Schmitt, it says 10nsec max
transisitions on the inputs when using it at 3.3V. Our bus will not even
be that fast. On purpose, for EMI reasons.
 
J

Joerg

Jan 1, 1970
0
Vladimir said:
Joerg wrote:




You can make a delay using something like 1G97.


I could also do it with a 74HC14 but I wanted to avoid more chips.

But the 200ns seems like an awful long time. Why would you need that?

I might get away with 100nsec. There is going to be some intricate
address decoding, more than just a 688 and a 154.
 
J

Joerg

Jan 1, 1970
0
Yuriy said:
http://www.google.com/search?hl=en&q=phillips+lvt&btnG=Google+Search

http://www.standardics.nxp.com/support/documents/logic/pdf/family.lvt.specification.pdf

...
RECOMMENDED OPERATING CONDITIONS
...
Dt/Dv Input transition rise or fall rate; Outputs enabled : <10 ns/V
...



Not according to specs.

http://www.standardics.nxp.com/products/lvt/pdf/74lvt2244.pdf
...
9. Recommended operating conditions:
...
Dt/DV input transition rise and fall rate; outputs enabled : <10 ns/V

I had the LVT244 in mind (sans terminator), not the LVT2244. For some
reason the NXP server doesn't find its data sheet anymore this morning.
Arrgh. Well, at least Digikey has a few thousand of them.
 
J

Joerg

Jan 1, 1970
0
Jim said:
Sure is a _crude_ way to get a timing delay. Why not do it right ?:)

Yeah, I know. If it had Schmitts it would be ok. Guess it ain't...
 
J

Joerg

Jan 1, 1970
0
Genome said:
This is standard practice when divisions of companies like Siemens or
Philips get sold off, broken up or reincarnated. Ultimately all the useful
data which you used to able to download as a single big book gets split up
into lots of little pieces that are then smeared about the new abortion of a
website and in the process a lot of it just disappears.

It's either job creation, stupidity or job creation for stupid people. The
final goal is to force you to contact an application stupid person using a
stupid web form that is invariably hidden behind a registration stupid web
form.

Yeah, it's sad. This moring the NXP server has become unable to even
find the LVT244 datasheet. &*#^!!. Link broken. Sometimes it is
unbelievable what people do to a formerly well-oiled machinery. What a
great company this had been in the 80's. Sad.

If you want the information you might try it but invariably you'll become

Mr Bum Bollocks
Bum Bollocks & Co Ltd
Bum Street
Bollockshampton

Just so you can say something like......

Re your p/n 123XYZ

I have just placed my order for 24,999,678 units with Not Your Company Ltd

Kindest ETC

Mr Bollocks

I stopped writing to top brass about serious issues a company has.
Because they rarely listen. So I just quietly skadaddle over to the
competition.
 
J

Jim Granville

Jan 1, 1970
0
Joerg said:
Are your sure the LVT is going? I am not too familiar with modern logic,
as an analog guy I usually get away with 74HC and CD4000.

Look at the dates on the data sheets, and the lack of a 'new' category
on their web site.

There were too many low voltage logics, and they seem to be slowly
rationalising to two wide voltage familes, the LVC and the AUP

Anyhow, this LVC driver doesn't look like Schmitt, it says 10nsec max
transisitions on the inputs when using it at 3.3V. Our bus will not even
be that fast. On purpose, for EMI reasons.

It explicitly says so in the data (above) - so where you have a conflict
like this, grab a device and try it :)

Often they still spec a Tr/Tf, in order for all the timing to be valid.
eg if they allowed a slow data rise, and a slow clock rise, then the
threshold match comes into play - so they give a test tr/tf, which
mitigates threshold effects, and makes all the ns specs valid.

Just try one: Ramp the inputs, and measure the Icc and output - there
will be a Icc/Vin relationship, that is not always given, and on
some devices that can be what I'd call poor. Probably does not matter
in your design.

-jg
 
J

Joerg

Jan 1, 1970
0
Jim said:
Look at the dates on the data sheets, and the lack of a 'new' category
on their web site.

There were too many low voltage logics, and they seem to be slowly
rationalising to two wide voltage familes, the LVC and the AUP

Thanks for the info, always good to know what's on the way to becoming
unobtanium.
It explicitly says so in the data (above) - so where you have a conflict
like this, grab a device and try it :)

Often they still spec a Tr/Tf, in order for all the timing to be valid.
eg if they allowed a slow data rise, and a slow clock rise, then the
threshold match comes into play - so they give a test tr/tf, which
mitigates threshold effects, and makes all the ns specs valid.

Just try one: Ramp the inputs, and measure the Icc and output - there
will be a Icc/Vin relationship, that is not always given, and on
some devices that can be what I'd call poor. Probably does not matter
in your design.

Or maybe I just place a couple Schmitt inverters to, as Jim put it, "do
it right".
 
J

Jim Granville

Jan 1, 1970
0
Joerg said:
Or maybe I just place a couple Schmitt inverters to, as Jim put it, "do
it right".

You could, (would cover more vendors), but to this Jim, using a part
with hysteresis IS 'doing it right'.
We've just designed in a Philips LVC2244 for that reason.

To my mind, all logic should have hysteresis by default, but I
do note that the new universal gates 1G57/58/97/98 all have hystersis.
( and the better CPLDs now have it selectable by pin )

If you need to start using 'fixup gates', have a look at those
universal gate series.
With one of those, you should be able to save 2 if your passives.

-jg
 
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