Shown below is a 2 stage emitter amplifier.
I am unable to figure out why that capacitor is placed in the middle
between the two stages. Also how did they get 2250 for the load
resistance? Please help me someone.
http://www.anycities.com/user/msc/stages.html
It's called "ac coupled." You can DC couple amplifier stages,
too. But it can eat up your supply voltage headroom pretty
fast. You want to recenter the average voltage at the collector
of the stage's transistor to about midway, so what they are
doing with the AC coupling is to allow the signal oscillations
to pass through the capacitor while blocking the steady DC level
of the 1st stage output. This makes it easier to set the input
bias point for the next stage and to better isolate each stage's
design and allow the recentering of this signal average at the
output back to about midway, again.
The load resistance seen by the 1st stage is approximately (not
exactly) looking at the 1st stage collector resistor in parallel
with each of the two input biasing resistors of the 2nd stage.
That works out to 2330 ohms. It's a little lower than that
because the emitter resistor of the 2nd stage, multipled by the
beta, is also in parallel. So assuming a beta of 100, this
means 2330 in parallel with 68k (100*680), which works out to
2250 ohms.
Also, it's typical to use a larger emitter resistor to ground,
in parallel with another series resistor+capacitor, to set the
AC gain while lowering the required DC quiescent current. But
that's not in the diagram you mentioned.
I'm a hobbyist, not a designer. This is *not* something I'm
practiced at, so take all this with a grain of salt.
Jon