 ### Network # Astable multivibrator calculations and Multisim

#### Integrator741

Jun 16, 2013
125
Hello,

I am having troubles calculating T(high) and T(low) of my astable multi vibrator, I think I got the formulas correct.

Th=0.693(Ra+Rb)C and Tl=0.693(Rb)C; Basically when i calculate my Th on a paper I get 41.58uS, but on multisim when I measure it I get 42.803uS; Then Tl I get 6.93uS, but when I check it on multisim I get 7.576uS.
My Ra is 5k; Rb is 1k; and C is 0.01uF; Also I calculated my frequency and I get 20Khz does that look correct?

I know the difference isn't that big, so should I just ignore it, or is there something I can do about it?! Thank you.

Last edited:

#### Arouse1973

Dec 18, 2013
5,178
Can you post the schematic?

#### KrisBlueNZ

##### Sadly passed away in 2015
Nov 28, 2011
8,393
I assume this is a 555 circuit, right?

I would expect the TH calculation to match very closely. The error you're seeing is about 3% which is more than I would expect.

The TL calculation may not match exactly because the 555's discharge output is a transistor collector, which doesn't pull all the way to 0V. The formula doesn't take that into account, but the simulation should. A discrepancy of 10% is a lot higher than I would expect for that as well.

I can't investigate the problem because I don't have Multisim. But if you can post the waveforms on pins 7 and 6, and tell us the exact voltages at the top and bottom of the waveforms, I may be able to figure out what's happening.

#### (*steve*)

##### ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Jan 21, 2010
25,507
I would consider the tolerance of the components too.

#### KrisBlueNZ

##### Sadly passed away in 2015
Nov 28, 2011
8,393
I would consider the tolerance of the components too.
He's comparing calculated values with a Multisim simulation.

#### (*steve*)

##### ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Jan 21, 2010
25,507
He's comparing calculated values with a Multisim simulation.

Oooh. That is odd.

Jun 16, 2013
125

Nov 28, 2011
8,393

#### jpanhalt

Nov 12, 2013
426
There are a few possible explanations:

1) The formulas for calculating the astable frequency are a little different depending on source. For example, consider this formula from Philips (NE555): That formula gives a calculated frequency of 21.29 KHz. Incidentally, no capacitor is shown from CV to ground in the schematic referenced; however, that does not mean it was not considered in development of that formula.

2) Was the Control Voltage considered? The circuit you post does not show a capacitor from the CV to ground. Albeit, the various datasheets state it is optional, particularly at low frequencies. However, the TI datasheet for the TLC555 (a CMOS version) states that a 0.1 µF capacitor there reduces the period by 10%. The National (TI) datasheet for the LM555 shows the numerator for frequency calculation as 1.44, not 1.49, and the reference circuit has a 0.01 µF capacitor from CV to ground. That datasheet does not make any comment about the magnitude of the effect of having that capacitor, but all of its circuits include one. It is conceivable that Multisym makes an adjustment for whether the capacitor is there or not or simply assumes one is there.

3) The 555 frequency is not entirely independent of supply voltage and temperature. Maybe the different calculations make different assumptions for the supply voltage and temperature dependence.

John

#### KrisBlueNZ

##### Sadly passed away in 2015
Nov 28, 2011
8,393
The "correct" formulas are for C charging through R1+R2 towards VCC from 1/3 VCC to 2/3 VCC (output high period), and for C discharging through R2 towards GND from 2/3 VCC to 1/3 VCC (output low period).

The time taken for the voltage across the resistor to drop to half its initial value when charging or discharging a capacitor is: t = R C -ln(0.5). -ln(0.5) is 0.69314718056. Therefore the ideal formulas are:

t(high) = 0.69314718056 * (R1 + R2) * C
t(low) = 0.69314718056 * R2 * C

The reciprocal 0.69314718056 is 1.44269504089. The value given in the Philips data sheet, 1.49, is 3.3% different. I don't know why this is.

Assuming R1, R2 and C are precisely right, and the frequency is relatively low, the biggest cause of frequency error in practice will be the saturation voltage of the discharge transistor inside the 555 between pin 7 and GND. This will increase the output low period, i.e. reduce the frequency, especially if R1 and/or R2 is a low value. This source of error is not taken into account in the formula that uses a constant 0.693... value but it probably will be simulated properly by Multisim. Therefore I would expect the simulation to have a slightly lower frequency than you calculated from that formula. That is what you're seeing, but the error, especially for t(low), is pretty high.

Re the capacitor on the control voltage pin (pin 5). In the standard 555, pin 5 is connected to the first (top) tap in a chain of three 5k resistors in series from VCC to GND. The two taps in the chain set the upper and lower trigger voltages. Adding a decoupling capacitor from pin 5 to ground should make no difference to the operating frequency. But you're right John; the TLC555 data sheet does say that the capacitor makes a 10% difference. They don't explain why, and I can't suggest a reason.

Temperature and supply voltage will make a pretty small difference to the frequency, I think. The differences he is seeing are 3% for t(high) and 10% for t(low). I think those are too high to be explained as temperature and voltage variations.

Here's an idea. If the difference in t(low) in the simulation is due to the saturation voltage of the transistor, the error will be less if you increase the resistor values. So multiply the resistors by 10 and divide the capacitor by 10, and re-run the simulation. According to the simple formula, this should give the same frequencies. My guess is that with the higher resistor values, t(low) will still be higher than the value you calculated with the simple formula, but not so much higher.

Last edited:

#### jpanhalt

Nov 12, 2013
426
The reciprocal 0.69314718056 is 1.44269504089. The value given in the Philips data sheet, 1.49, is 3.3% different. I don't know why this is.

To a precision of 10E-11, really? Philips probably considered the rest of the circuit, including the transistor bases connected to the divider, and spiced that with a little empirical data.

Philips' choice of the term "nominal" in its application note and datasheets clearly implies the value is different from the mathematical exactness of ln 2. Similarly, TI inferred as much in its CMOS datasheet.

I believe the correct value to use in any given case is that given in the manufacturer's datasheet, unless one has data to refute it. Besides, in a real circuit, not simulation, other sources of errors will likely exceed what is being discussed here.

John

#### (*steve*)

##### ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Jan 21, 2010
25,507
I'm not suggesting this is a likely probability, but the possibility exists that the simulation does a series of straight line approximations. It may use instantaneous values for the rate of change of voltage on the capacitor to calculate the voltage on the capacitor after some short delta t. As delta t gets larger, errors will appear.

Is there a way to increase the resolution (reduce delta t) on the simulation?

#### BobK

Jan 5, 2010
7,682
An analog simulator uses numeric integration to solve the equations at each delta t. Spice keeps reducing the step until the results converge, and it will tell you if the step becomes too small without converging. Don't know about multisim through.

Bob

#### KrisBlueNZ

##### Sadly passed away in 2015
Nov 28, 2011
8,393
To a precision of 10E-11, really? Philips probably considered the rest of the circuit, including the transistor bases connected to the divider, and spiced that with a little empirical data.
Not exactly. ln(2) is actually closer to 0.693147180559945309417232, according to Windows Calculator! Certainly the value in the data sheet doesn't need to be specified to that accuracy, and I wasn't trying to imply that it should be, although it does look like I was.
Philips' choice of the term "nominal" in its application note and datasheets clearly implies the value is different from the mathematical exactness of ln 2.
The issue with the value in the Philips data sheet is not that it's only specified to three significant digits, but that the third digit is different from the calculated value. The calculated value is 1.442695, which taken to three significant digits is 1.44, but the data sheet says 1.49. That's what I can't explain.
I believe the correct value to use in any given case is that given in the manufacturer's datasheet, unless one has data to refute it. Besides, in a real circuit, not simulation, other sources of errors will likely exceed what is being discussed here.
I agree that in practice, other sources of error will dominate. This is a 555 circuit, after all. Accuracy is not expected. But I think the OP is asking a valid question: Why is the t(low) period in the simulation about 10% longer than the calculated value? Do you have any suggestions?

#### Integrator741

Jun 16, 2013
125
The "correct" formulas are for C charging through R1+R2 towards VCC from 1/3 VCC to 2/3 VCC (output high period), and for C discharging through R2 towards GND from 2/3 VCC to 1/3 VCC (output low period).

The time taken for the voltage across the resistor to drop to half its initial value when charging or discharging a capacitor is: t = R C -ln(0.5). -ln(0.5) is 0.69314718056. Therefore the ideal formulas are:

t(high) = 0.69314718056 * (R1 + R2) * C
t(low) = 0.69314718056 * R2 * C

The reciprocal 0.69314718056 is 1.44269504089. The value given in the Philips data sheet, 1.49, is 3.3% different. I don't know why this is.

Assuming R1, R2 and C are precisely right, and the frequency is relatively low, the biggest cause of frequency error in practice will be the saturation voltage of the discharge transistor inside the 555 between pin 7 and GND. This will increase the output low period, i.e. reduce the frequency, especially if R1 and/or R2 is a low value. This source of error is not taken into account in the formula that uses a constant 0.693... value but it probably will be simulated properly by Multisim. Therefore I would expect the simulation to have a slightly lower frequency than you calculated from that formula. That is what you're seeing, but the error, especially for t(low), is pretty high.

Re the capacitor on the control voltage pin (pin 5). In the standard 555, pin 5 is connected to the first (top) tap in a chain of three 5k resistors in series from VCC to GND. The two taps in the chain set the upper and lower trigger voltages. Adding a decoupling capacitor from pin 5 to ground should make no difference to the operating frequency. But you're right John; the TLC555 data sheet does say that the capacitor makes a 10% difference. They don't explain why, and I can't suggest a reason.

Temperature and supply voltage will make a pretty small difference to the frequency, I think. The differences he is seeing are 3% for t(high) and 10% for t(low). I think those are too high to be explained as temperature and voltage variations.

Here's an idea. If the difference in t(low) in the simulation is due to the saturation voltage of the transistor, the error will be less if you increase the resistor values. So multiply the resistors by 10 and divide the capacitor by 10, and re-run the simulation. According to the simple formula, this should give the same frequencies. My guess is that with the higher resistor values, t(low) will still be higher than the value you calculated with the simple formula, but not so much higher.

It worked, I multiplied the resistors by 10 and divided the capacitor by 10 and it worked! Although I get 1.2% mistake on T(l) but I guess that's alright isn't? How would you explain that?

#### KrisBlueNZ

##### Sadly passed away in 2015
Nov 28, 2011
8,393
It worked, I multiplied the resistors by 10 and divided the capacitor by 10 and it worked! Although I get 1.2% mistake on T(l) but I guess that's alright isn't? How would you explain that?
What do you mean it "worked"? With higher resistances, t(high) in the simulation is a lot closer to the calculated period, and t(low) in the simulation has dropped from being about 10% longer than calculated, to 1.2% longer than calculated, right? If so, that confirms my suspicion that the difference is due to the discharge transistor not pulling pin 7 all the way down to 0V. So if you just wanted to understand why the difference occurs, now you know. I wouldn't worry about it any further.

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