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AVR & VON NEUMANN vs HARVARD ARCHITECTURE

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UFO Joe

Jan 1, 1970
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Excerpted from AVR Butterfly Site at: http://retrodan.tripod.com

VON NEUMANN vs. HARVARD ARCHITECTURE

If you are new to Microcontrollers one of the arguments you are going to hear bantered about is Harvard Architecture versus the Von Neumann Architecture.


THE VON NEUMANN ARCHITECTURE

Most computers we are familiar with use an architecture called Von Neumann. The term arose out of Neumann's 1945 draft report on the ADVAC computer. He was not, however the original inventor of it.

+---------+
| RAM |
| - - - - |
BottleNeck | PROGRAM |
[CPU] <==========> | - - - - |
| DATA |
+---------+

A Von Neumann machine has one large monolithic RAM structure that contains both program memory and data memory mixed together. Since both program steps and data must be loaded from the same place, it can create a problem called the Von Neumann Bottle-Neck.


THE HARVARD ARCHITECTURE

Most microcontrollers use a different system called Harvard architecture. The larger program storage and the smaller data memory are separated. The first such machine, the Harvard Mark I had it's programs hard-coded on paper-tape and the volatile data was loaded into electric relays.


+----------+ +------+
| PROGRAM | | DATA |
| ROM | <----> [CPU] <----> | RAM |
+----------+ +------+


Harvard style machines allow program steps to be fetched at the same time as data, thereby creating potentially faster through-put and less of a bottle-neck. They also have the benefit that run away processes can't damage the program stored in the non-volatile program area so they're more stable. Many C programs lack proper boundary checking and a null pointer or an over-run buffer can overwrite and crash a program that shares RAM with data.
If you are new to this architecture you need to keep this in mind. When creating a routine that needs a few bytes of storage, I would normally create that space within the routine itself. On a Harvard machine, those bytes would not be in volatile RAM but part of the hard coded program memory stored in ROM (or FlashRAM).



AVR BUTTERFLY PROGRAM SPACE (FLASH)

The AVR Butterfly (Atmega169) program space is 16K long and is divided into two main areas. The top 1-2K and is usually loaded with a bootloader that is protected from an overwrite and the rest is available for your programs. At the beginning of each program space is an area for interupt vectors. The first such vector is the Power-Up/Reset Vector and should contain an RJMP to the first line of your program.


.---------------------------------------------------.
| POWER-UP VECTOR (NORMALLY POINTS TO YOUR PROGRAM) |
| OTHER INTERUPT VECTORS |
|- - - - - - - - - - - - - - - - - - - - - - - - - -|
| |
| YOUR PROGRAM SPACE (14-15K) |
| |
| |
.---------------------------------------------------.
| BOOT:INTERUPT VECTORS |
|- - - - - - - - - - - - - - - - - - - - - - - - - -|
| BOOTLOADER PROGRAM SPACE (1-2K) |
`---------------------------------------------------'


AVR BUTTERFLY DATA SPACE (SRAM)

The data space on the AVRs is a little unusual. The 32 internal accumulators are memory mapped as the first 32 bytes of data memory, followed by all the I/O ports which are mapped into memory space followed by the 1K of actual SRAM starting at $100.


.---------------------------------------------------.
|$00-$1F: 32 Internal Accumulator/Working-Registers |
+---------------------------------------------------+
|$20-$5F: 64 Input/Output Ports |
|- - - - - - - - - - - - - |
|$60-$FF 160 Extra I/O Ports |
+---------------------------------------------------|
|$100 |
| 1024 Bytes SRAM $100 to $4FF |
| |
| |
|- - - - - - - - - - - - - |
|$4FF (Normal Location for Stack) |
`---------------------------------------------------'
 
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