Maker Pro
Maker Pro

Buffer stage

Hi,
with your help, i've designed an opamp folded cascode with a fixed
capacitive load....now i want to make an output (mosfet) stage voltage
follower-voltage follower....My output stage is composed by 2 voltage
follower output transistor, each of them piloted by a mosfet current
source (or sink) and a common drain...the gate of the 2 common drain
are connected to folded cascode's capacitive load. I don't understand
a strange problem that i've found.
1)If, before to connect output stage to folded cascode,i connect an
ideal ac source to buffer stage and an output load, i obtain the
desidered output stage's pole frequency
2)if i connect folded cascode's load (instead ac source), buffer pole
has a lower frequency (folded cascode pole is unchanged)
Why??
Thanks
 
M

MooseFET

Jan 1, 1970
0
Hi,
with your help, i've designed an opamp folded cascode with a fixed
capacitive load....now i want to make an output (mosfet) stage voltage
follower-voltage follower....My output stage is composed by 2 voltage
follower output transistor, each of them piloted by a mosfet current
source (or sink) and a common drain...the gate of the 2 common drain
are connected to folded cascode's capacitive load. I don't understand
a strange problem that i've found.
1)If, before to connect output stage to folded cascode,i connect an
ideal ac source to buffer stage and an output load, i obtain the
desidered output stage's pole frequency
2)if i connect folded cascode's load (instead ac source), buffer pole
has a lower frequency (folded cascode pole is unchanged)
Why??
Thanks

It sounds like the input capacitance of the buffer stage is big enough
to matter.
 
How input capacitance can modifiy output pole?

It is presenting a capacitive load on the high impedance point of the
folded cascode (output), shifting the pole. I assume you mean the Bode
response of the amp+buffer is difference from the amp alone.
 
It is presenting a capacitive load on the high impedance point of
the
folded cascode (output), shifting the pole. I assume you mean the Bode
response of the amp+buffer is difference from the amp alone.

No, i have an output buffer with capacitive load: if this output
buffer is not connected to folded cascode, it presents the right pole;
if instead is connected to folded cascode with its capacitive load,
the buffer's output pole has a lower value (the output pole of folded
cascode is the same with or without buffer stage). I don't understand
how input capacitance can vary buffer's output pole....
thanks for the help
 
M

MooseFET

Jan 1, 1970
0
 > It is presenting a capacitive load on the high impedance point of
the


No, i have an output buffer with capacitive load: if this output
buffer is not connected to folded cascode, it presents the right pole;
if instead is connected to folded cascode with its capacitive load,
the buffer's output pole has a lower value (the output pole of folded
cascode is the same with or without buffer stage). I don't understand
how input capacitance can vary buffer's output pole....
thanks for the help


Have you tried driving the buffer with a high impedance of some other
type? Your buffer stage likely has a feedback from the output node to
the input. The situation may look something like this:

Cfb
-[Z]-----+----!!--------
! !
! ---- !
---!+ \ !
! GM OO---++---
---!- / ! !
! ---- ! --- Cload
--------------- ---
!
GND

With a zero value for Z, the pole position is controlled by the
resistance of GM and Cload forming a simple time constant. With non-
zero Z, the non-inverting input of the GM has a smaller signal on it
and hence the GM appears to be a higher impedance.
 
 > It is presenting a capacitive load on the high impedance point of
the

Well, lets try to parse this.
No, i have an output buffer with capacitive load: if this output
buffer is not connected to folded cascode, it presents the right pole;
OK, just who exactly has this pole, i.e. the buffer itself? And if it
is in the right hand plane, why bother attaching it to the cascode?

if instead is connected to folded cascode with its capacitive load,
the buffer's output pole has a lower value (the output pole of folded
cascode is the same with or without buffer stage).
This in itself seems unlikely since the buffer must present a bit of
capacitance to the folded cascode, which should move the poles of the
folded cascode a detectable but perhaps not significant amount.

I don't understand
how input capacitance can vary buffer's output pole....
thanks for the help

Not seeing this buffer, I am assuming you go up a Pfet and down a
Nfet. The fets have gate to source capacitance. Put them in a string
(source of Pfet drives gate of Nfet) and connect the capacitive load,
and you have capacitors in a string. CGS of P fet connects to CGS of
Nfet connects to load capacitance. Hence the buffer has some inherent
feedback path. Generally the buffer is of sufficient transconductance
(at the output stage) that the feedback path is not significant, i.e.
the dominant pole of the folded cascode would provide stability.
Perhaps you need more current in the buffer output stage.
 
Top