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CMOS Differential Amp question

Hi!

What is the maximum and minimum input voltage of a CMOS differential
amplifier with active loads with respect to the power supply rails?

Thanks.
Amy
 
Hi!

What is the maximum and minimum input voltage of a CMOS differential
amplifier with active loads with respect to the power supply rails?

It varies from device to device. If you have a particular CMOS
differential amplifier in mind, you can go to the manufacturers web
site, and down-load the data sheet for that device, where this
information is available.

Look for the input common mode range - which is the range of input
voltages for which the amplifier outputs will mean something useful.

The inputs can usually survive a wider range of input voltages, but
the output voltages can sometimes behave rather oddly for extreme
input voltages.
 
E

Eeyore

Jan 1, 1970
0
Hi!

What is the maximum and minimum input voltage of a CMOS differential
amplifier with active loads with respect to the power supply rails?

I suggest you read the data sheet. They're all different. I don't see why the
load makes a differnce btw.

What's your actual problem.

Graham
 
E

Eeyore

Jan 1, 1970
0
It varies from device to device. If you have a particular CMOS
differential amplifier in mind, you can go to the manufacturers web
site, and down-load the data sheet for that device, where this
information is available.

Look for the input common mode range - which is the range of input
voltages for which the amplifier outputs will mean something useful.

The inputs can usually survive a wider range of input voltages, but
the output voltages can sometimes behave rather oddly for extreme
input voltages.

Including inversion !

Graham
 
S

Stanislaw Flatto

Jan 1, 1970
0
Eeyore said:
I suggest you read the data sheet. They're all different. I don't see why the
load makes a differnce btw.

Just a note: Mr Murphy never fails. Active load will display negative
resistance at some part of its response curve at some frequency and
beying in feedback sensing cirquit gives you the s**ts.
What's your actual problem.

Graham

Stanislaw.
 
R

Rich Grise

Jan 1, 1970
0
I suggest you read the data sheet. They're all different. I don't see why
the load makes a differnce btw.

What's your actual problem.

Mid-terms. ;-)

Cheers!
Rich
 
R

Rich Grise

Jan 1, 1970
0
Including inversion !

AKA phase reversal. A risk often encountered when using an op amp for
a comparator.[/QUOTE]

Inversion is NOT "phase reversal" - the output is precisely in phase,
(within the freq. limits of the amp), simply inverted in polarity.
Phase reversal requires a 180 degree PHASE SHIFT at the frequency
in question. Inversion doesn't do that.

Now, admittedly, the graph of -sin(t) _LOOKS EXACTLY LIKE_ sin(t + 180),
but they _ARE_ different. The second version (sin(t + 180)) requires
some kind of memory of the previous state - -sin(t) doesn't.

Cheers!
Rich
 
Hi Jim,

I want to know the maximum and minimum input voltages that can be
applied to the differential amplifier with respect to the power
supply.

Thanks.

Amy
 
J

Jim Thompson

Jan 1, 1970
0
Hi Jim,

I want to know the maximum and minimum input voltages that can be
applied to the differential amplifier with respect to the power
supply.

Thanks.

Amy

Presuming P-type substrate, the inputs can't go below ground without
forward biasing the NMOS body diodes.

There are two possible scenarios in the positive direction...

With no ESD structures in place: You can go as positive as allowed
before the gate oxide punctures (breaks down).

With ESD structures in place: If you go above the positive rail these
diodes will conduct.

If the question really is what is the linear operating region it
depends on many individual device parameters and the load at Vo.

If there's no load at Vo, it's characteristics will be
comparator-like.

Hope that helps.


...Jim Thompson
 
R

Rich Grise

Jan 1, 1970
0
Hi Jim,

I want to know the maximum and minimum input voltages that can be
applied to the differential amplifier with respect to the power
supply.

Please don't top-post: It interrupts the natural flow of the thread.

In answer to your question, have you actually read the data sheet? It
should be called out clearly.

Good Luck!
Rich
 
R

rush3k

Jan 1, 1970
0
Hi! Thanks for your replies. What I meant was active load of
differential amplifiers in integrated circuit design, not discrete
amplifiers.
An example of a differential amplifier with active loads can be found
at:

http://www.deas.harvard.edu/courses/es154/pdf/lecture12.pdf
Slide 22

Thanks.

for max input, you start from top rail (vcc/vdd) and subtract all the
threshold and overdrive voltages in the path from vcc/vdd to vin ...
and same applies to vee/vss/ground ... look at gray and meyer's
analysis and design of analog ics
 
for max input, you start from top rail (vcc/vdd) and subtract all the
threshold and overdrive voltages in the path from vcc/vdd to vin ...
and same applies to vee/vss/ground ... look at gray and meyer's
analysis and design of analog ics

Hi rush3k,

Tell me if I am right.

Referring to my diagram at http://www.deas.harvard.edu/courses/es154/pdf/lecture12.pdf
Slide 22, from the top rail minus one threshold voltage of the PMOS is
the maximum input voltage.
From VSS minus one overdrive voltage of the current mirror and minus
one threshold voltage of the input transistor. That is the minimum
input voltage.

Thanks.
 
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