Thanks for those answers.
I'm afraid I'm still not sure what you want, but here's what I have so far.
I'm not sure whether this circuit will do everything you want. Have a look at the description and let me know.
I haven't worked with current transformers before, so if you use this circuit, be prepared to do a bit of testing, measurement and experimentation. I hope you have Skype and are prepared to spend some time on this project, because this will probably be required! Do you have access to an oscilloscope? It will probably be needed.
Currents in two mains circuits are monitored by T1 and T2 which have a ratio of 100A:50mA. The maximum current of interest in either phase is 22A RMS which translates to 11 mA RMS or 15.6 mA peak.
U1A and U1B convert this current into a voltage. The 12V supply is split by RH1 and RH2, forming a voltage rail called VAR (amplifier reference voltage) which is about 2.8V. This is done to keep the voltages at U1A and U1B's inputs inside the power supply rails so they can amplify correctly.
U1A operates as an inverting conductance amplifier, which converts an input current (coming from T1) into an output voltage, which is relative to VAR. An op-amp with negative feedback (through RC1) adjusts its output voltage to keep its inputs at the same voltage. When current out of the bottom pin of T1's secondary is negative, U1A's output will provide an equal current in the opposite direction through RC1 to keep the inputs at the same voltage.
U1 is an ON Semiconductor MC33179P quad op-amp with high current outputs that can easily supply enough current to match the 15.6 mA coming from the current transformer. To force 15.6 mA through RC1, U1A's output must go about 4.2V positive with respect to VAR, i.e. to about +7V.
When the current from the bottom end of T1 is positive, U1A's output cannot swing low enough to match the current; it will just bottom out, and the two 1N914 diodes across the current transformer will limit the differential input voltage to about +/- 0.8V and prevent damage to U1A.
So U1A's output is biased at 2.8V (from VAR) and swings positive in response to negative current from the bottom end of T1's secondary, translating a peak current from T1 of 15.6 mA into a peak voltage of 4.2V relative to VAR.
U1A's output cannot go higher than about 9V so the U1A circuit block cannot reproduce peaks that exceed about 23 mA at T1 secondary, which corresponds to a mains current of about 32A RMS.
The other side of the mains current waveform is not used, and only the peak current of the mains waveform is measured, so it's assumed that this current is a sinewave (or at least that both phase current waveforms have the same shape or are at least symmetrical above and below zero). This is true if the loads have a power factor of 1, which is true of heating loads and incandescent lighting loads, but not necessarily true of energy-efficient lights and fluorescent lighting, and switching power supplies such as those used in computers and electronic consumer appliances.
The output of U1A is rectified by DR1 and smoothed by CT1. There is a voltage loss of about 0.7V in DR1.
The voltage on DR1 cathode represents the measured phase current, relative to about 2.1V (VAR minus one diode voltage drop).
U1B operates identically but measures the current in mains circuit 2.
RT1, VRF and RT2 form a voltage divider that taps off about half of the CT1 voltage; this is fed to one input of U1C, which compares two voltages. Its other input is fed with about half the CT2 voltage (which represents the current in the second mains circuit).
U1C's output drives QI which acts as an inverter and produces a voltage at its collector that swings almost fully from one supply rail to the other. When QI.C (collector of QI) is high, current through RL causes LED1 to light, indicating that the current in mains circuit 2 is higher than that in mains circuit 1, and current through DH produces a voltage of 0.7V on DH's anode.
An adjustable amount of this voltage is taken off by VRH (hysteresis setting trimpot) and fed to the bottom of the RT3/RT4 voltage divider, providing hysteresis in the comparator.
Here is the hysteresis action described in detail.
Assume the VCT1 (voltage on CT1) is much higher than the VCT2. U1.10 (U1 pin 10) will be much higher than U1.9, so the output at U1.8 will be high. (U1C is used as a simple voltage comparator.) There is no base bias for QI so QI is OFF, and RP pulls QI.C to zero volts. There is no voltage on VRH, so the RT3/RT4 voltage divider divides the voltage between CT2 and 0V, and the result feeds U1.9.
Now assume that the mains phase 2 current increases steadily. The voltage on CT2 increases steadily until VU1.9 is higher than VU1.10; when this happens, U1.8 will go low. This turns QI ON, and current flows through RL, LED1 and DH, producing a single diode voltage drop (about 0.7V) on DH.A (anode of DH). An adjustable portion of this voltage (adjusted by VRH) now appears on the bottom of the RT3/RT4 voltage divider, causing VU1.9 to increase further. This produces the clean switching action that is characteristic of hysteresis, because VCT2 now has to decrease further before U1C will switch back the other way.
VRF adjusts the voltage division in the RT1/VRF/RT2 divider so that one or other phase can be favoured. That is, when VCT1 and VCT2 are equal, and ignoring the effect of the hysteresis circuit, adjusting VRF causes U1.10 to see a greater or lesser portion of VCT1, so that the comparison is biased in favour of one phase or the other.
So VQI.C is high when the phase 2 current is higher than the phase 1 current, and otherwise is low. This voltage is fed through RD to CD which provide a delay to prevent rapid switching. (The hysteresis in the comparator stage will also tend to prevent rapid switching.) The time delay of the RD/CD circuit is roughly equal to RD (in ohms) multiplied by CD (in farads), which is 330e3 * 100e-6 which is 33 seconds. This is only approximate. To change this delay, vary CD, not RD.
U1D operates as a Schmitt trigger (a voltage detector with hysteresis). The trigger voltages are about 1/3 and 2/3 of the supply rail, i.e. 4V and 8V, and these thresholds apply to VCD. RSF provides the hysteresis; it adjusts U1D's threshold voltage (U1.12) according to the output state. The output on U1.14 is the opposite of U1.13 (because it's an inverting Schmitt trigger), so when the phase 2 current is greater than the phase 1 current, VCD is high, and U1.14 is low, turning ON QR and activating the relay.
Therefore the relay closes when the phase 2 current is higher than the phase 1 current.