R
Rikard Bosnjakovic
- Jan 1, 1970
- 0
I'm designing a small alarm-circuit for a veroboard and I've run into a
problem that I hope anyone can help me with.
The truth table for triggering my alarm is this:
a b trig alarm
0 0 0
0 1 0
1 0 1 <--
1 1 0
That is, ab'.
In the circuit I'm using a 74LS03 (quad 2-NAND O/C) and up to this moment
three of the four gates are used. Because of the limitations of the
project size I cannot add another IC to the board, but there is room for a
couple of diodes and transistors.
What I need to do is manually constructing the ab' output. Since I'm
having a free NAND gate, I can invert either a or b to get 0/0 or 1/1
respectively, but I'm unable to get any further since I haven't been able
to figure out what to do next.
problem that I hope anyone can help me with.
The truth table for triggering my alarm is this:
a b trig alarm
0 0 0
0 1 0
1 0 1 <--
1 1 0
That is, ab'.
In the circuit I'm using a 74LS03 (quad 2-NAND O/C) and up to this moment
three of the four gates are used. Because of the limitations of the
project size I cannot add another IC to the board, but there is room for a
couple of diodes and transistors.
What I need to do is manually constructing the ab' output. Since I'm
having a free NAND gate, I can invert either a or b to get 0/0 or 1/1
respectively, but I'm unable to get any further since I haven't been able
to figure out what to do next.