Good morning...I have some simple help with n-Jfet biasing and behavior.
I desire a highly resistive (6.0 Gohm>) input terminal to an electrometer; to capture Coulombs from the capacitor for a voltage at the Fet's gate. I have started with an open-drain amplifier (see below).
...thank you Digikey SchemeIt
Can I use -VSS to setup a drain current?
Looks like VG= -GSS, for VGS=0...ID(sat)?
But, does gate resistance increase as -Vss "increases" (more Vneg)?
Thanks in advance!
-ps. I would like to see Vneg at the capacitor before the meter starts processing
I desire a highly resistive (6.0 Gohm>) input terminal to an electrometer; to capture Coulombs from the capacitor for a voltage at the Fet's gate. I have started with an open-drain amplifier (see below).
...thank you Digikey SchemeIt
Can I use -VSS to setup a drain current?
Looks like VG= -GSS, for VGS=0...ID(sat)?
But, does gate resistance increase as -Vss "increases" (more Vneg)?
Thanks in advance!
-ps. I would like to see Vneg at the capacitor before the meter starts processing
