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vick5821

Jan 22, 2012
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Dear all, what is the difference between Asynchronous counter operation and synchronous counter operation ? Seem that they produce the same output ?

Refer to attachement.Thank you

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Harald Kapp

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They do produce the "same" output only if you look at the outputs in a coarse fashion, meaning the steady state between clock pulses.
On a synchronous counter all outputs change at the same time (neglecting small differences in propagation delay of individual flipflops) becausee all flipflops are triggered by the same clock.
In an asynchronous counter only one flipflop (the Least significant bit = LSB) is triggered by the clock. The outer flipflops are triggered by the output of the preceding flipflop each. Thus the count ripples or propagates through the chain of flipflops. That is why you see glitch in the asynchronous circuit (and you should be able to see the rippling count if your time resolution is increased).
In the extreme case the LSB will be triggered before the MSB (most significant bit) has changed. This happens if the clock period is as long as the propagation delay of the flipflop chain. In this case the counter never reaches the steady state.

Harald
 

vick5821

Jan 22, 2012
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They do produce the "same" output only if you look at the outputs in a coarse fashion, meaning the steady state between clock pulses.
On a synchronous counter all outputs change at the same time (neglecting small differences in propagation delay of individual flipflops) becausee all flipflops are triggered by the same clock.
In an asynchronous counter only one flipflop (the Least significant bit = LSB) is triggered by the clock. The outer flipflops are triggered by the output of the preceding flipflop each. Thus the count ripples or propagates through the chain of flipflops. That is why you see glitch in the asynchronous circuit (and you should be able to see the rippling count if your time resolution is increased).
In the extreme case the LSB will be triggered before the MSB (most significant bit) has changed. This happens if the clock period is as long as the propagation delay of the flipflop chain. In this case the counter never reaches the steady state.

Harald

I dun get what do you mean by the bolded part :(
 

Harald Kapp

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LSB is the output of the flipflop that counts fastest (left in your circuit).
MSB is the output of the flipflop that counts slowest (right in your circuit).

Take your asynchronous simulation model and icrease the clock frequency. Increase the frequency such that f = 4/Tff, then f=1/Tff (where Tff is the propagation delay clock->Output) of the flipflop. Watch the outputs.
It should become obvious (if the flipflop models simulate timing).

Harald
 
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