Mike Herbakovich said:

I have to design a circuit that recognizes the sequence 1101 with D flip

flops. So I need two flip flops. But I don't understand the state table,

why does the Present state in the third row 11 instead of 10?

Present Next State Ouput Z

State x=0 x=1 x=0 x=1

00 00 01 0 0

01 00 11 0 0

11 10 11 0 0

10 00 01 0 1

Here's the link, Table 4-7 which is a binary representation of Table 4-5.

The state diagram is Figure 4-21

ftp://ftp.prenhall.com/pub/esm/electrical_and_computer_engineering.s-045/mano/lcdf_2e_updated/supplements/ch04.pdf

I switched row three with row four and got

my equations

D_1= BX+AB

D_2= X

Z= AB'X

Mike,

The table (4-7) you mentioned, may be good to show what has to happed e.g.

the definition of the case. However, from the designers point of view it is

not so clear. A simplified method to describe the funtion to design it by

D-flip-flops is a kind of truth table. The current state, represented by Q0,

Q1 along with the input signal X can be considered as inputs. The next state

represented by D0, D1 and the output signal Z are outputs. So you find the

following table:

X Q1 Q0 | D1 D0 Z

--------|--------

0 0 0 | 0 0 0

0 0 1 | 0 0 0

0 1 0 | 0 0 0

0 1 1 | 1 0 0

1 0 0 | 0 1 0

1 0 1 | 1 1 0

1 1 0 | 0 1 1

1 1 1 | 1 1 0

Table 4-7 Rewritten for design. Use fixed font (Courier) to view.

From this table you can extract the formulas quite easily.

As for the third row in the original table 4-7, this is a matter of choice.

Theoretically your are free to choose the state codes. In practice, it is

usefull to change as less flipflops as possible when changing state,

especially when the outputs of the flipflops are fed into some combinatorial

logic. Flipflops tend to change not exactly at te same time and this can be

the cause of gliches in the output signal. In this particular case the

"normal" sequence 1101 is represented by the states 00, 01, 11, 10 and 01

again. All but the 10 state change by toggling only one flipflop. The 01

state changes both flipflops while accepting (recognising) the 1101

sequence. It is the only time an output signal has to be made so it may have

some glitches. However, you will not have any glitches as long as the

required sequence has *not* been recognised. In some cases, when glitches

are totaly unacceptable, an extra flipflop is used. But this lays beyond the

current problem I guess.

pieter