M
Michael
- Jan 1, 1970
- 0
Hey there - so my job doesn't allow me to do much in the way of analog
design, so for fun last night I decided to design a high current
voltage buffer. The idea is that it'd take a 0-10V input, and would
output the same voltage, except with the ability to drive up to about
10A. The design eventually evolved in my head into a PID controller
using op amps driving a P FET. So I scribbled down some notes and
passed out. This morning I drew it out, corrected a couple oversights,
and chose some components. I have posted what I came up with here:
http://s2.supload.com/free/High_Current_Voltage_Buffer.png/view/
The op-amp choice was very arbitrary - I just wanted a rail to rail
quad op-amp, and the OPA4234 was already in my schematic capture
program's library. I chose the FET a slight bit more carefully - I
wanted a low on resistance FET capable of dissipating a lot of power
while also being able to handle a lot of current. I ended up with the
IRF IRLR9343. It can't completely handle the specs I gave - but it can
get fairly close.
So - in this design R2, R3, R4, and R5 set the PID gains, with P = R2/
R3, I = R2/R4, and D = R2/R5. I put in fairly arbitrary values for R2-
R5 - giving initial gains of 0.5 for all three. This would obviously
need tweaking based on the application. Also, the resistor between the
op-amp and the gate of the FET was a pretty arbitrary value - I put it
in there to protect the op-amp, though it'll also significantly slow
down the circuit.
So - can anybody spot any mistakes? I suspect there are at least a
couple. Also - is there any way to do this on a unipolar supply? Any
way to get rid of an op-amp? My only thought on getting rid of an op-
amp was to make the summer into a combination summer/difference
amplifier so that it'd sum the I and D terms while subtracting the -P
term, but I couldn't find a way to make the math work out cleanly. Any
other comments or suggestions?
Thanks!
-Michael
design, so for fun last night I decided to design a high current
voltage buffer. The idea is that it'd take a 0-10V input, and would
output the same voltage, except with the ability to drive up to about
10A. The design eventually evolved in my head into a PID controller
using op amps driving a P FET. So I scribbled down some notes and
passed out. This morning I drew it out, corrected a couple oversights,
and chose some components. I have posted what I came up with here:
http://s2.supload.com/free/High_Current_Voltage_Buffer.png/view/
The op-amp choice was very arbitrary - I just wanted a rail to rail
quad op-amp, and the OPA4234 was already in my schematic capture
program's library. I chose the FET a slight bit more carefully - I
wanted a low on resistance FET capable of dissipating a lot of power
while also being able to handle a lot of current. I ended up with the
IRF IRLR9343. It can't completely handle the specs I gave - but it can
get fairly close.
So - in this design R2, R3, R4, and R5 set the PID gains, with P = R2/
R3, I = R2/R4, and D = R2/R5. I put in fairly arbitrary values for R2-
R5 - giving initial gains of 0.5 for all three. This would obviously
need tweaking based on the application. Also, the resistor between the
op-amp and the gate of the FET was a pretty arbitrary value - I put it
in there to protect the op-amp, though it'll also significantly slow
down the circuit.
So - can anybody spot any mistakes? I suspect there are at least a
couple. Also - is there any way to do this on a unipolar supply? Any
way to get rid of an op-amp? My only thought on getting rid of an op-
amp was to make the summer into a combination summer/difference
amplifier so that it'd sum the I and D terms while subtracting the -P
term, but I couldn't find a way to make the math work out cleanly. Any
other comments or suggestions?
Thanks!
-Michael