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Designing a high current (10A) voltage buffer

M

MooseFET

Jan 1, 1970
0
I think N fets make better use of the silicon. In other
words, for a given chip size, you get a higher performance
fet if it is N-channel than if it is P-channel. Higher
performance is defined as
1/(gate capacitance * channel resistance) or some such.

Add a * BreakdownVolts ^2 in there. For a given sized MOSFET, the on
resistance increases as something near the square of the breakdown
voltage.

If you make a P-IGBT, the bipolar part of the device is NPN. This
suggests that there should be a different situation in the IGBT. The
MOSFET and the bipolar parts are always the compliment type.
 

neon

Oct 21, 2006
1,325
Joined
Oct 21, 2006
Messages
1,325
If you want dc in dc out use a 10A regulator one chip. In yoursuposed design you forgot to trow in the kitchen sink. Simplicity is the mother of all virtues.
 
J

John Popelish

Jan 1, 1970
0
John Popelish wrote:

(I just realized that I was talking about one configuration,
common source output but was thinking of the more usual
common drain output.)

(snip)
But the feedback network (that can include signals from both the opamp
output and the MOSFET output) can have other gains and phase shifts at
other frequencies.

A very simple, though, perhaps sub optimal (not the highest frequency
response) version would be a resistor from MOSFET output back to + and a
capacitor from the opamp output back to +. This pair has a perfect gain
of 1 at DC from the MOSFET output (since the capacitor has infinite
impedance at DC). But above some frequency, where the capacitor
impedance approaches the resistor resistance, the capacitor takes over
as the effective feedback, and the MOSFET output no longer follows the
input, but the opamp is kept in a stable feedback situation.

Of course, that won't work as stated, because the opamp
output is inverted (at least at low frequencies), compared
to the MOSFET output. So capacitive feedback around the
opamp to the + input is positive feedback, not negative
feedback. Duh! So with a common source output stage, an
additional inversion is needed to make use of the opamp
output as negative feedback, or that feedback has to be
connected to the - input, in some way.
 
M

Michael

Jan 1, 1970
0
It can be a huge noise amplifier, and gets quirky in a lot of
situations.

Hmm - I guess I can see that noise could cause problems with the D.
When would a PID controller be better than just a PI?
Sure. But the opamp isn't ideal, and its gain will start to droop at
some frequency, so it's never going to be pure proportional. And a lot
depends on the load... if it's a pure resistor as shown, good, but any
load capacitance complicates life, and the fet itself has capacitance.
So the proportional gain may have to be very low to keep the loop
stable, so then you's need some integral to get accuracy.

But this doesn't seem right - let's say the op-amp is magically
outputting the correct voltage to the FET. The differential term will
output zero, and thus the P term will drop to zero, and since there's
no I or D, the output to the FET will be zero. Or am I forgetting
something? Something isn't adding up...
This ain't simple. Keep in mind that the transcondance of the fet will
vary with current, so the loop dymamics aren't fixed. The safe thing
to do is to make a *slow* P+I controller, slow as in low KHz loop
bandwidth, if you can tolerate that.

So, if I were to need higher bandwidth, how would I go about changing
the circuit?

Thanks,

-Michael
 
R

Robert Latest

Jan 1, 1970
0
Michael wrote:

[too much stuff]

Look, before diving into all that PID theory, why don't you first spec what
your current booster has to deliver, bandwith-wise? You may get what you
want from one opamp, one MOSFET, and three or four discrete parts without
any math. If you need more performance and have the cash you might want to
look at Apex's line of high-current opamps.

With a circuit that is capable of burning in excess of 100 watts, you also
may have to think of overcurrent and overtemperature protection.

robert
 
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