Details of Sigma-Delta Modulator Design

[Tim Wescott]

I'm trying to explain the functioning of sigma-delta modulators. I've
got a good handle on how to build a decent 1st-order S-D modulator, but
I'm light on practical details of 2nd-order ones.

The information to be found by Googling gets me lots of general
statements about "2nd order is better because of the extra integrator",
along with pretty graphs that have no numbers on their axes. This is
very good for the manufacturers trying to sell S-D ADCs and DACs, but it
doesn't help me much.

I assumed that it would be fairly easy to whomp up a 2nd-order S-D
modulator simulation to find this all out, but so far I'm only building
modulators that perform worse than their 1st-order cousin.

Is there any specific information out there, either on the web or in
print, that give some concrete examples of how to arrange a 2nd-order
S-D modulator so that it actually _outperforms_ a 1st-order example?

TIA.

 

[Ian Buckner]

I'm trying to explain the functioning of sigma-delta modulators. I've
got a good handle on how to build a decent 1st-order S-D modulator, but
I'm light on practical details of 2nd-order ones.

The information to be found by Googling gets me lots of general
statements about "2nd order is better because of the extra integrator",
along with pretty graphs that have no numbers on their axes. This is
very good for the manufacturers trying to sell S-D ADCs and DACs, but it
doesn't help me much.

I assumed that it would be fairly easy to whomp up a 2nd-order S-D
modulator simulation to find this all out, but so far I'm only building
modulators that perform worse than their 1st-order cousin.

Is there any specific information out there, either on the web or in
print, that give some concrete examples of how to arrange a 2nd-order
S-D modulator so that it actually _outperforms_ a 1st-order example?

TIA.

Richard Schreier has contributed a Matlab toolbox for
simulating high order sigma delta converters. It is available
on the Mathworks site and a number of other places.
google on "Schreier toolbox delta sigma".

Regards
Ian

 

[Roy McCammon]

I'm trying to explain the functioning of sigma-delta modulators. I've
got a good handle on how to build a decent 1st-order S-D modulator, but
I'm light on practical details of 2nd-order ones.

The information to be found by Googling gets me lots of general
statements about "2nd order is better because of the extra integrator",
along with pretty graphs that have no numbers on their axes. This is
very good for the manufacturers trying to sell S-D ADCs and DACs, but it
doesn't help me much.

I assumed that it would be fairly easy to whomp up a 2nd-order S-D
modulator simulation to find this all out, but so far I'm only building
modulators that perform worse than their 1st-order cousin.

Is there any specific information out there, either on the web or in
print, that give some concrete examples of how to arrange a 2nd-order
S-D modulator so that it actually _outperforms_ a 1st-order example?

TIA.

Crystal Semiconductor (later bought by Cypress) used to have
very good app notes on this subject. The app notes might
still be available, or maybe someone has an old Crystal data
book with the app notes.