I wasnt clear in my original post. There are 2 boards involved here
with 2m of cable inbetween. The 74HCT573 with 10k pull-ups is on my
board (it is the one I have control over - but not my design) and the
opto-isolator is on the other board (I have no control over this). The
500uA referred to is the current required to pull down my boards
inputs, and I mentioned I thought this was on the low side. As the
opto-isolator is being under-driven it cannot sink this current, so I
can see them asking me to increase the pull-up value. This seems wrong
to me, hence my question about limits.
If the opto cannot be expected to sink more than 80uA (you haven't
disclosed the rates required and that is important to know, along with
the details, I suppose, about what composes the 2m of cabling
impedance), you need to be sure that your end can work correctly with
that much capability. Your inputs require at least 500uA, I gather,
mostly because of the existing 10k pull-ups on your end (5v/10k =
500uA, and ignoring any HCT input requirements.) That simply needs to
change.
You could increase the pull-ups on your end and yes that may very well
impact the supportable rates. If so, you need to find another way
than just a simple modification of a pull-up to get the job done, I'd
imagine. Modifying a simple passive isn't necessarily the right
solution, if you are trapped by other requirements, and you should be
prepared to find a route that is correct for the application and not
simply limited to finding a resistor value you aren't comfortable
with. In other words, perhaps consider using an active front end.
John's point about the node capacitance is important and this will
include everything from the 4N25 transistor itself, though the cable,
and onto your input circuit, whatever that is. The 4N25 will have to
drive it all with what it has in place at rates that work for you. You
may need to think closely about this.
I gather that the 10k pull-up on your side is the only explicit
pull-up that the 4N25 output transistor sinks against and that you
don't have access to the transistor base at the 4N25? My guess is
that you aren't doing rates much in excess of 1kHz (and I'm wondering
about meeting your HCT input thresholds as it is.) Increasing that
resistor will probably demolish your rate, my guess. If you can only
expect about 80uA, then you might consider using a PNP on your end
before the HCT input, with appropriate resistors. I think you should
be able to acheive the same rates on that current. Also, perhaps,
consider a current steering arrangement using two BJTs.
Jon
