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Engineering Talent seeks Position


Dana Raymond

Jan 1, 1970
Mr. Dana F. Raymond

744 Proudfoot Lane, Apt #1112, London, Ontario, Canada. N6H 5H8
Phone: (519) 697-6790 Email: [email protected]


MANAGER / TEAM LEAD / ELECTRONIC SYSTEMS DESIGNER. To participate in and/or lead development of microprocessor based products, from the system level to the component level. 23 years designing experience as "hands-on" broad-spectrum skills type, interested in offering creative solutions and innovative approaches to hardware and software design.


The majority of senior level or higher Engineers have either achieved a great deal of expertise in a specialized discipline or have joined the ranks of Management and are no longer technical contributors. Then there are people like myself, who have maintained a very broad technical skill set while amassing the experience and management skills needed to lead product development teams. Because I avoided the large corporate engineering department during the early part of my career, I have enjoyed exposure to many industries and have worn many hats over the years. The past few years working for Advanced Micro Devices (AMD) has allowed for significant technical and managerial achievement within a formal teamwork-oriented environment.

If you are looking for someone who can go deep technically in a variety of disciplines, while being able to deal with groups, teams, and individual personalities equally well, then I may be the person you are looking for. I think I can be especially useful providing liaison between groups, or leading a group with a different mission within a corporate structure, or leading a small resource-limited group needing my individual technical contribution.


Product Development Engineer, April 2004 - May 2004

Oxy-Light Inc., Headquartered Hamilton, Ontario

Assisted with the completion of an alpha prototype biological instrument, a completion report, and beta prototype project proposal. This project is currently suspended waiting government funding grant application approval. Needless to say, I would not have moved to London, Ontario and accepted this position if this eventuality was anticipated.

Consultant, October 2003 - April 2004

Self Employed, Austin, Texas

Completed a few board level designs involving logic development, circuit design, and PCB layout.

Member of Technical Staff, Product Development Engineer, September 2000 - May 2003

Advanced Micro Devices (AMD), Austin, Texas
a.. Promoted to Member of Technical Staff with team lead responsibilities, I was responsible for the technical direction and execution of engineering projects within AMD
b.. Responsible for the development of several (Bach, Beethoven, Bach2) K8 (Athlon/Opteron) post production test platforms (SLT - System Level Test) which are full motherboards used to test each and every production CPU using directed diagnostics and full OS application suites
c.. Resources used for the production of SLT boards resulted in over $1 Million comparative savings for the first 18 months of the program, based on a new approach I proposed and drove forward.

Other projects completed:

· SLTBusMe - A DOS shell application used to interact with the SLTBus interface and peripherals

· Excalibur - A full AGP test stimulus and response capture board for AGP bus silicon validation. I was responsible for the FPGA limited speed and functionality version used for early validation of silicon and the ASIC itself

· Helm - A PCI-based high speed communications board used to interface to an in-house LDT/HT bus analyzer. Using SERDES transceivers and Xilinx FPGAs the analyzer software running in windows could communicate to the bus analyzer at over 1GBps

· ESDTool - A DOS based shell tool that incorporated many commands, from basic Memory/I/O to AGP GART initialization, Helm test routines, BigRealMode support, etc. This tool was used by several AMD groups

Senior Product Development Engineer, August 1998 - September 2000

Advanced Micro Devices (AMD), Austin, Texas

As a member of the Silicon Validation group, I assisted with development of directed diagnostic software, digital circuitry, and Printed Circuit Boards used by the group to validate the functional operation of chipsets. Projects included:

· Development of directed diagnostics for silicon validation of the Elan SC520 Integrated Processor.

· Assumed lead role for Random & Concurrency test development for the SC520 Processor

· Developed a PCB that added PCI bus, ROM/RAM, and other interface blocks to the Adaptex reconfigurable emulation platform

· Developed an API allowing output to a multi-function I/O board used during directed diagnostic testing

· Developed a shell tool used to test AGP GART operation using a PCI stimulus card

One notable achievement was the development of AMD's very first AGP bus stimulator. As there were no AGP video cards out on the market at this time, I attempted to use an alpha release ATI Rage 120 Pro video card provided for evaluation to AMD. To demonstrate the technical depth of my work I'd like to detail for you the steps required to accomplish this task:

1. I used a HP logic analyzer equipped with a Future+ AGP 2X bus analyzer to capture all bus traffic from ATI diagnostics, and transfer it to a computer running custom analysis software.

2. I wrote special custom analysis software designed to take logic analyzer bus transaction records and process them to look for key proprietary command sequences used to initiate AGP traffic. This software's functionality had to be very flexible and changeable in an instant, so I crafted it using a series of C++ filter module objects. Each module could be linked together to perform complex filtering functions from a basic set of simple blocks. 'T' and 'Y' modules could be used to split and recombine the filter stream at will.

3. It turned out that a good 80% of bus traffic seen was due to PCI reads and writes to the 80X25 text video memory region. So I added a module that would capture these transactions and replace them with a video text representation once a full screen scroll was completed.

4. Having isolated the command sequences of interest, I wrote a DOS command shell application that allowed for managing the GART and initiating AGP bus read and write requests.

This toolset was used by a variety of AMD groups to perform signal integrity, functional testing, and regression tests on AMD silicon and platforms. ATI was very impressed with this project.

Engineering Manager, October 1996 - August 1998
Memex Electronics Inc., Hamilton, Ontario.
Project Management, Hardware Design, Software Design, and PCB Layout. Other duties included the creation of Scientific Research & Experimental Development (SR&ED) reports and the successful completion of an IRAP grant. Products I developed included:

· MXHSL2 Expansion Board re-design and 4 layer PCB layout

· MX1100 BTR (Behind-Tape-Reader). Hardware design and 4 layer PCB Layout. 68340

· MX1600 Memory Upgrade for Fanuc 16 CNCs. Reverse engineering, hardware design and 4 layer PCB layout

· TinyBMI R&D prototype for "Proof of concept". Hardware design and 2 layer PCB layout. Significant analysis of dual-68K CNC architecture was required, especially as it includes custom LSI

· MX340 MPU Module. Hardware design and 4 layer PCB layout

· MiniBMI R&D prototype. Hardware and CPLD design, and 2 layer PCB Layout. Development of techniques for safely introducing multi-processing to single-CPU architecture via a debug port.

· SIMMTEST Memory SIMM tester. Hardware and CPLD design, and 2 layer PCB layout. This design used Lattice ISPLSI1016 CPLDs and a PIO24 I/O board for host interface. Complete test suite written in Borland C

· HSLTerm Software Product. IBM PC hosted terminal emulation software written in Borland C. This software is included with many products shipped to allow for a uniform installation procedure

· MXHSL3 High Speed Loading Bubble Memory Unit. Predecessor to the MXHSL4 (see below), missing Ethernet, PCMCIA, and QuickLoad features. Hardware and CPLD design, and 4 layer PCB layout

· MXBMI Basic Machine Interface. This is the final design in the BMI series. Hardware design (including Lattice ISPLSI1048E interface CPLD) and 4 layer PCB layout

· BMITerm Software Product. IBM PC hosted terminal emulation software based on HSLTerm (above). BMITerm connects directly to a MXBMI and accesses CNC information normally not available any other way (EG. The screen image obtained by direct access of video memory). Software written in Borland C

· MX3 Memory Upgrade for Yasnak CNCs. Uses Lattice ISPLSI1016 CPLD for logic, and a rechargeable lithium battery-backup subsystem. Reverse engineering, hardware and CPLD design, and 4 layers PCB layout

· TESTPM Personality Module-based Tester. This tester uses the MXBMI as a processor subassembly and personality modules for testing different memory boards. Hardware and CPLD design, 2 layer PCB layout and software written in ANSI C

· MXHSL4 High Speed Loading Bubble Memory Unit. The latest masterpiece. Hardware and CPLD design, and 4 layer PCB layout

Engineering Manager, October 1995 - October 1996
Omega V Technologist Inc., Hamilton, Ontario

a.. As primary developer, responsible for the design and development of several electronic products, including the Derna-Wand (sold internationally), PBX Modem Coupler, an Automotive Temperature Controller (HVAC), and an Automotive Timer/Controller
b.. Two "proof of concept" research projects were completed - A demonstration of carrier current communications used by desktop computers in a commercial setting; and a demonstration of automatic transmission of CCD security camera images to remote locations, via FAX
c.. Managed the Derma-Wand successfully through the CSA/UL certification process

Consulting Designer, March 1991 - October 1995
Formed Foxtrot Systems Ltd., Hamilton, Ontario

· An Engineering Services company, this position allowed the direct placement of my skills with high technology companies

· Focused on embedded systems development, including systems level software and micro-processor hardware design, for industrial products. Areas included third-party CNC machine hardware, broadcast industry technology, and on-going SCADA systems development

Engineering Manger, July 1989 - March 1991
Canadian Applied Technology Inc., Scarborough, Ontario

· Responsible for the reorganization of the Production, Test, Field Service, and Engineering Departments

· Managed a team of 4 Designers and Technologists which grew in size to 12 when I managed production for a large system installation

· Designed and implemented the CAT2200 MKII Remote Terminal Unit and various software packages using CAD/CAM software

· Performed project design, management, and engineering functions for an Air Quality Monitoring System installed at Dalhousie Generating Station, New Brunswick

Design Engineer, September 1984 - July 1989
Industrial Measurements Limited., Markham, Ontario

· Developed the Digisponder line of Supervisory Control And Data Acquisition (SCADA) equipment, including a Central Station Computer and Remote Terminal Units

Design Engineer, April 1983 - September 1984
Trimasco Engineering and Associates, Toronto, Ontario

· Developed a bank client queue management system used to steer clients waiting in line to a free teller window. The system used a pulsed ultrasonic detection scheme to determine when tellers were occupied with clients. Tellers could control their availability with a switch, and a desk-top status display allowed the supervisor to monitor system performance

· Other products developed include specialized security equipment and home satellite TV receiver accessories

September 1981 to March 1983 - Supervisor, Test and Repair

OWL Instruments Limited, Downsview, Ontario

· Supervisor of Post-Production Test and Repair Department

· Instituted test and fault tracking procedures

· Provided in-house and field service training

· Developed diagnostic software.


· While working for Advanced Micro Devices on a free trade (TN) work visa, my work history, project examples and written testimonies from five employers were submitted for university evaluation. A Professor of Engineering concluded I met the requirements for educational equivalence to a Bachelors of Science Degree

· Advanced Micro Devices, Austin, Texas (1993 - 2003) - Courses included: The PCI Bus 2.0; C++ for OOP; Synopsis Verilog Coding Styles

· Graduated 3-year high school Industrial Electronics Program, equivalent to an Electronic Engineering Technologist Diploma. Rosemere High School, Rosemere, Quebec.


· Available upon request


Product Exposure Silicon Validation Techniques and Methods

Air and Water Quality Monitoring

Supervisory Control and Data Acquisition

Medical Bed-Side Monitors (BSM)

Private Branch Exchanges (PBX)

Computer Numerical Control (CNC)

Broadcast Monitoring

System Design LDT/HT, AGP, PCI, ISA, LPC, I2C, SMBus buses

Complete SCADA Systems

Embedded Systems (full design & implementation)

Current Carrier TDMA Communications

Ultrasonic Detection System

Systems and Applications Level software products

Embedded Multitasking Operating System

Compiler for Automatic Responsive Behavior

Software Design Microsoft C V7, Lattice & Turbo C, Borland C++

80X86 (MASM), Z80, and 8048 family Assembler

MPC C Compiler for full PIC15C/16C/17C Family


Hardware Design Xilinx CPLD/FPGA Logic Implementation

Emulation platforms for Silicon Validation

Motorola 68340 and 68EN360 MPUs


10BASE-T and AUI Ethernet

PIC16C84 and 16C64 Processors

Z80 and 8080 Processor and Peripherals

8051 and 8048 family Microcontrollers

Lattice 1016 and 1048E CPLD and other PLDs

Low Power CMOS digital design

Phonetic and LPC speech synthesis

Analog Design Voltage and Frequency Margining Circuitry

Low Power CMOS analog design

Battery Backup and Data Retention

Industrial Sensing and Control

Bell 103 Modems

Pulsed Ultrasonics

Product Support Customer and Sales Support, On-Site Training

User and Technical Manuals

Project Management Recruitment and Evaluation of Staff & Contractors

Team Coordination and Scheduling (up to 8 persons)

SR&ED Reports, IRAP Projects, and CSA Certification

CAD/CAM Synopsis Verliog synthesis, FPGA P&R

Synario Schematic Entry and ABEL HDL Logic Fitter

Lattice PDS Logic Compiler and Fitter

Orcad Capture for Windows V9.1

Pads PCB V7 with BlazeRouter

SDS CrossCode C Compiler & SingleStep Debugger

Tango Schematic Capture V1.40

Tango PCB+ V2.3 and Tango Route+ V1.3

MKS LEXX & YACC for compiler/interpreter design


Jan 1, 1970
I suppose the first thing you would fail on is figuring out simple
tasks like what groups to post resumes.

Mr. Dana F. Raymond

To send me e-mail remove the sevens
from my address.


David L. Jones

Jan 1, 1970
.. said:
I suppose the first thing you would fail on is figuring out simple
tasks like what groups to post resumes.

What is wrong with posting to sci.electronics?
It is an electronics engineering resume is it not?

Dave :)

Dana Raymond

Jan 1, 1970
Thanks Dave. Its not like I'm posting over and over.

David L. Jones

Jan 1, 1970
Dana Raymond said:
Thanks Dave. Its not like I'm posting over and over.

Hi Dana,
Your post is certainly on-topic and welcome here by most of us I'm
sure, I personally think it's great to see.
I know guys who have got contract and permanent jobs through the
Best of luck

Dave :)

David L. Jones

Jan 1, 1970
Most folks who access sci.electronics do so thru Google Groups.

I bet you they don't.
I personally use Google groups because I use multiple machines so it's
the most convienient way. But Google groups does not give you any of
the features of a good News Reader program which you will find most
people still use.
The new Google beta groups is a bit better but still nothing like a
good newsreader program.
Webmasters who are not 8 years out of date
give no access to this *non-existant* newsgroup.[email protected]

Well, you are posting here, I'm posting here, everyone else is posting
here, look to be pretty popular to me!

Dave :)