Hi Everyone,

I am working on Jitter in Analog to Digital Converters(ADCs). I am

trying to setup an experiment to see the effects of jitter in real

time ADCs. I have an ADC evaluation board with external clock input

for sampling (i.e Sampling clock).

Now I want to produce a self created jittery signal to see the effects

of jitter in ADC. Can anyone out there have any idea(s) how I can

produce a real time clock signal with "variable jitter" for the input

of external clock? Producing a simple clock signal (i.e. without

jitter) is straight forward with the help of any signal generator but

a clock signal with "variable jitter" is a problem.

Thanks for your help.

Cheers

Bilal

Get a fast analog comparator or a differential-LVDS-to-CMOS converter

chip.

Apply your low-jitter logic-level signal generator to the + input of

the comparator. Bias the - input to about logic mid-swing and AC

couple a noise source into that. The output clocks your adc, and the

jitter will depend on the slew rate of the edge at the + input and the

ac noise level at the - input; the math here is direct. The noise

source can be any waveform you like and will determine the probability

distribution of the jitter; random, gaussian noise would be the

typical choice, or use a triangle wave for a flat probability

distribution.

To get lots of jitter, you may have to reduce the slew rate of the

clock generator. Some pulse generators have adjustable slew rate, but

if yours doesn't, a simple r-l-c lowpass filter can control edge rate

pretty accurately.

Some of the adc's around these days need femtosecond RMS clock jitter

to meet their accuracy specs.

John