External ROM read problem

[Ed]

I have a circuit using a DS89C450 micro and an external 1m(128kx8)ROM.
I am using P1.0 as an upper address bit which is low for this test.
I have /CE tied low and use /OE derived from p3.7(/rd) to read from the ROM.
When I do a movx a,@dptr /OE does go low and about 10ns later the data
becomes valid but goes away after 30ns.
Shouldn't the data be valid throughout the entire /OE ?
When I send the data I received to the serial port, it was 00h and not what
I saw for the 30ns but what was after the 30ns.
I have msg'd the manufacturers tech support also.
Any ideas?

 

[James Beck]

I have a circuit using a DS89C450 micro and an external 1m(128kx8)ROM.
I am using P1.0 as an upper address bit which is low for this test.
I have /CE tied low and use /OE derived from p3.7(/rd) to read from the ROM.
When I do a movx a,@dptr /OE does go low and about 10ns later the data
becomes valid but goes away after 30ns.
Shouldn't the data be valid throughout the entire /OE ?
When I send the data I received to the serial port, it was 00h and not what
I saw for the 30ns but what was after the 30ns.
I have msg'd the manufacturers tech support also.
Any ideas?

I'm not familiar with the part you are using, but the following should
still hold true.

The address should be valid for the min setup time of the ROM before the
data will be valid. It shouldn't matter that the /OE is on during that
time, but it needs to be valid before the processor latches the value.
That means the data may not be valid during the entire period of /OE,
but it may be. Depends on how your decoding and data latching occurs.
What speed are you trying to access the ROM at and is it within the
ability of the ROM to work at that speed?

Jim

 

[Ed]

Problem solved.
I missed the pull-ups on P0
Thanks

I have a circuit using a DS89C450 micro and an external 1m(128kx8)ROM.
I am using P1.0 as an upper address bit which is low for this test.
I have /CE tied low and use /OE derived from p3.7(/rd) to read from the
ROM.
When I do a movx a,@dptr /OE does go low and about 10ns later the data
becomes valid but goes away after 30ns.
Shouldn't the data be valid throughout the entire /OE ?
When I send the data I received to the serial port, it was 00h and not
what I saw for the 30ns but what was after the 30ns.
I have msg'd the manufacturers tech support also.
Any ideas?

Make sure that you are latching the lower 8 bits of address (AD[0..7] on
P0) with /ALE, the ROM needs a steady 17-bit address for the entire Read
Cycle.