Le Wed, 11 Dec 2013 10:08:52 -0500, Phil Hobbs a Ã©crit:
That seems to be a lot closer with JFETs than with MOSFETs.
I did some measurements a few years back that showed that 2N7002s kept
improving as I cranked the V_GS feedback up from 0.5*V_DS to 1.5*V_DS.
. (Doesn't have
the 150% feedback measurements unfortunately--I'll see if I can find
I recall you already saying that.
In fact, for the usual circuits conditions a JFET is not a MOSFET
The main difference is that, at ordinary low level currents, you use the
JFET in its quadratic region, while you use the MOSFET in its
subthreshold region. And that makes for all the difference...
See, for a JFET, in the triode region:
ID = k ((vgs-vt) vds - 1/2 vds^2)
when substituting vgs for vc+1/2*vds (vc for control voltage)
ID = k vds (vc - 2 vt)
which indeed is the mark of a resistor.
Now for a MOSFET in the subthreshold region the drain current is
diffusion driven and you have:
ID = is W/L Exp[vgs/(n uT)] (1 - Exp[-vds/uT] + vds/va)
with va being the equivalent of BJT early voltage,
and n an "ideality factor" above 1, ordinarily between 3 and 5 for power
MOSFETS. (the 2N7002 is a power MOSFET)
In the low level triode region vds/va << 1 and the drain current
ID = is W/L Exp[vgs/(n uT)] (1 - Exp[-vds/uT]) (Eq1)
From the last term of Eq1, one can see that for vds>4*uT (roughly 100mV)
there's no more ID dependency on vds and the MOSFET behaves like a super
FET with constant 100mV triode to saturation "vds knee voltage".
For a constant vgs, the (1 - Exp[-vds/uT]) term makes for a drain current
barely linear up to the 25mV uT
If now you set vgs=vc+k1*vds by mean of external circuitery you get:
ID = is W/L Exp[(vc+k1*vds)/(n uT)] (1 - Exp[-vds/uT]) (Eq2)
You factor out a beta=W/L is Exp[vc/(n uT)] term which depends only on
physics and control voltage, then you Taylor expand ID at vds=0 to 3rd
order (get it simple
and you get:
ID = beta [vds/uT + (k/n-1/2)(vds/uT)^2 +
(3 k^2 - 3 k n + n^2)/(6 n^2) (vds/uT)^3)] (Eq3)
You can null the 2nd order term by setting k=n/2, (1.5 to 2.5, depending
on the ideality factor value). The 3rd order term then simplifies to 1/24.
Note that this is kind of optimal for low distortion at vanishingly low
If you want a usable vds range up to say 100mV, maybe 200mV, at cost of a
somewhat reduced linearity you just lower k1.
For a 100mV vds range, a pretty good linearization occurs for k1=n/3
(=1.6 for a small power MOS with n=5) which roughly tallies with your
With k1=n/3 the expanded ID becomes:
ID = beta [vds/uT - 1/6 (vds/uT)^2 + 1/18 (vds/uT)^3)]
and that gives a resistance variation of only 1.5% up to 100mV vds.
Note that this is totally independant from the resistor value as vc
doesn't enter into the equation.