W
Winfield Hill
- Jan 1, 1970
- 0
FPGA breakthrough paper in the January issue of Nanotechnology:
"Nano/CMOS architectures using a field-programmable nanowire
interconnect," by Gregory Snider and Stanley Williams of HP Labs.
"Compilation of standard benchmark circuits onto FPNI chip models
shows reduced area (8 × to 25 ×), reduced power, slightly lower
clock speeds, and high defect tolerance..." 25 times, whew!
The paper is available free for the next month or so on the IOP
website, http://www.iop.org/EJ/abstract/0957-4484/18/3/035204
Click on PDF.
"Nano/CMOS architectures using a field-programmable nanowire
interconnect," by Gregory Snider and Stanley Williams of HP Labs.
"Compilation of standard benchmark circuits onto FPNI chip models
shows reduced area (8 × to 25 ×), reduced power, slightly lower
clock speeds, and high defect tolerance..." 25 times, whew!
The paper is available free for the next month or so on the IOP
website, http://www.iop.org/EJ/abstract/0957-4484/18/3/035204
Click on PDF.