It is to expencive
I thought so. So they need to be a least about 300kHz apart (min.
200kbps)
It doesn't need to be all analog
If there is a good balance of 0s and 1s in the bitstream you are
transmitting, then it's fairly easy to use a PLL to make the (analog)
modulator frequency stability as good as that of a reference crystal.
The PLL will need a fairly low loop bandwidth to avoid causing
excessive baseline wander.
The PLL will also need a fairly low comparison frequency to avoid the
problem that occurs when the phase modulation on the output (due to
the FSK) scaled by the feedback divider exceeds +/- 2 pi radians,
which is the linear range of the phase detector.
You might need to use a scrambler to ensure a good balance of 0 and 1.
Regards,
Allan