I need help for this problem.. I have a test tomorrow and this is the

only problem I do not know how to do... any help would be appreciated!

Thank you very much!

10. Given the following specifications, answer the questions that

follow.

74LSxx Family Devices 74Fxx Family Devices

Max Typ Min Max Typ Min

IOL 25mA 23mA 22mA 33mA 32mA 31mA

IOH -23mA -21mA -20mA -30mA -27mA -25mA

IIH 200uA 150uA 100uA 250uA 200uA 180uA

IIL -300uA -280uA -260uA -320uA -300uA -280uA

What is the fan-out for LS devices driving LS devices?

What is the fan-out for F devices driving LS devices?

Fan out is the number of inputs (worst case limits) that can

be driven by an output while remaining inside the voltage

limits for a logic low and logic high state.

Taking the LS family, for example, the worst case (weakest)

output current that an output can sink (IOL or output

current absorbed while maintaining a logic low voltage) is

at least 22 mA, while pulling down to a valid logic low

voltage. Each input may supply as much as (highest spec)

300 uA current into that output (IIL) or input current

supplied into a logic low voltage), while it is pulling down

to a logic low. Since there are about 73 times 300 uA in 22

mA, the pull down fan out is up to 73. Each output can

supply up to 20 ma while maintaining a logic high state

(IOH), while each input may need up to 20 uA supplied to it,

hold it up to a logic high state (IIH). Since there are

about 100 of 200 uA in 20 mA, the fan out for a logic high

is up to 100. But you have to take the lower of these two

conditions, so the 73 for the logic low rules. You would

expect a fairly large speed reduction, if you ever came

close to this limit, because the output also has to charge

and discharge all the trace and input capacitances before

stable logic level voltages are achieved.

I hope I got all that right.