Maker Pro
Maker Pro

I'm popping MOSFETS....linear derating factor involved?

J

John

Jan 1, 1970
0
I believe I've found a cause for at least one of my FET-popping
incidents. When the circuit is powered up and the battery to be
drained is not connected to the LOAD+ and LOAD- terminals, the op-amp
is driving the FET gates hard. If I now connect the battery, one heck
of a current spike flows thru the FET for a short time until the servo
loop can bring the current back down. This can't be good for the FET
and probably popped at least one of them due to movement (intermittent
contact) of the battery connections in my earlier prototype when I was
hooking up the scope (or whatever).

I've been playing with the circuit in LTSpice (thanks again Terry!)
and have not been able to find a way to slow down the circuit enough
to prevent this spike. I've tried caps on the inv. and noninv. inputs
of the op-amp, increasing the size of the gate cap and res. and
placing a cap at the LOAD+ pin....no luck. Is it possible to prevent
this spike?

John
-- remove SPAMMENOT for e-mail responses --
 
J

Joseph2k

Jan 1, 1970
0
John said:
I can't find anything more than 5mV of noise or voltage variation
anywhere with the scope. I tried grounding the probe to both the main
supply ground and at op-amp gnd (and measuring around). Even when
that noise on the input to the op-amp, the cap on its output seems to
slow everything down enough to not let the noise affect the MOSET's
gate voltage.

My (possibly) exceeding the total dissipation rating of the FET isn't
a possible cause for the popping of FETs too? Still don't know if my
calculations and assumptions about linear derating factors are right.

John

-- remove SPAMMENOT for e-mail responses --
One thing i can tell you for sure, running your devices even near power
dissipation limits severely degrade lifetime. Part of the issue is that
the junction to case thermal path degrades under those conditions.
 
J

Joseph2k

Jan 1, 1970
0
John said:
Well, originally, no. :)
With my testing to confirm that the circuit was stable and no other
ratings were exceeded I was concentrating on the "other" stuff like
derating factors. Especially since the circuit is based on one you
gave me last year. But, here it is. I could be very wrong about my
asssumptions that exceeding the total power rating for the FET could
be my only problem.


. Vcc
5V
. |
. 1K
. |
. +------, +5V ,-----+----- LOAD+
. | | | LT1013 | |
. 1.25V POT <-+--R2--+-----|+\ D |
. Ref | | | | >--+--R6-- G |
. -+------+-, | | ,--|-/ | S |
. | | | | | === C1 | |
. | | | | | | | |
. +--|--R3--|--+----|---+---R5----+ |
. | | | | | |
. | | | | R7 |
. | | | | | |
. | | '--R4---+-------------+-----|-+--- LOAD-
. | | | |
. | | | |
. | | +5V ,-----+ |
. | | | | |
. | +--R2--+-----|+\ D |
. | | | >--+--R6-- G |
. | | ,--|-/ | S |
. | | | | === C1 | |
. | | | | | | |
. LOW-LVL GND+-----R3--|--+----|---+---R5----+ |
. | | | |
. | | R7 |
. | | | |
. '--R4---+-------------+-------+
|
HI-AMP GND

R2, R3 = 49.9K,1%
R6 = 1K,1%
R4, R5 = 10K,1%
R7 are 0.01ohm,1%,3W
C1 = 0.01uF monolithic ceramic
MOSFETs are IRFP2907 or IRF1405.

LOW-LVL GND and HI-AMP GND are brought back separately to the supply's
GND pin.

Prototype circuit is breadboarded with short leads, well decoupled
with a quiet linear power supply. After setting the pot, current is
steady to within 0.1A up to 30A (max for my tests). Scoping out the
power supply, inv. and noninv. inputs to op-amps and gate lead to
MOSFETs shows no more than 4-5mV of noise.

John

-- remove SPAMMENOT for e-mail responses --
Would things work for you with 3 transistors in "parallel"? The thermal
advantage is significant.
 
J

John

Jan 1, 1970
0
I've been playing with the circuit in LTSpice (thanks again Terry!)
Wait a sec....
My problem might be that the circuit already is "too slow"!
The high-am-p pule thru the FETs when I hook up the battery needs a
really fast circuit to be able to sense the voltage across the source
resistor (current sense resistor) and immediately adjust the gate
voltage to stop the current flow.

I don't want to speed up the servo loop because a nice slow loop is
good for ignoring anything that might come along during operation but
I still need some way to stop that huge current pulse if the battery
connection is intermnittent or the battery is connected after the
circuit is powered up.

John
-- remove SPAMMENOT for e-mail responses --
 
T

Terry Given

Jan 1, 1970
0
John said:
Wait a sec....
My problem might be that the circuit already is "too slow"!
The high-am-p pule thru the FETs when I hook up the battery needs a
really fast circuit to be able to sense the voltage across the source
resistor (current sense resistor) and immediately adjust the gate
voltage to stop the current flow.

thats a very real possibility :)
I don't want to speed up the servo loop because a nice slow loop is
good for ignoring anything that might come along during operation but
I still need some way to stop that huge current pulse if the battery
connection is intermnittent or the battery is connected after the
circuit is powered up.

John

what you need to do is toss in something to detect a no battery
condition, and clamp your setpoint to zero. When a load comes along
(easy to tell as its a battery) you can then let go of the reference
pin, and away it goes.

Something a control guru pointed out to me years ago was that *NO*
controller can follow a step, ever. One important part of building a
real-world controller is some form of ramp limiting on the reference, so
you never ask for the impossible. In your case, an LM339 and a cap would
do the trick.

Cheers
Terry
 
T

Tony Williams

Jan 1, 1970
0
John said:
I believe I've found a cause for at least one of my FET-popping
incidents. When the circuit is powered up and the battery to be
drained is not connected to the LOAD+ and LOAD- terminals, the
op-amp is driving the FET gates hard. If I now connect the
battery, one heck of a current spike flows thru the FET for a
short time until the servo loop can bring the current back down.

Perhaps the mod below.
12V
. |
. 1K
. |
. +------, +5V ,-----+----- LOAD+
. | | | LT1013 | |
. 1.25V POT <-+--R2--+-----|+\ D |
. Ref | | | | >--+--R6-- G |
. -+------+ | | ,--|-/ | S |
. | | | | === C1 | |
. | | | | | | |
. +--|--R3--|--+----|---+---R5----+ |
. | | | | | |
. | | | | R7 |
. | | | | | |
. | | '--R4---+-------------+-----|-+--- LOAD-
. | | | |
. | | | |
. | | +5V ,-----+ |
. | | | | |
. | +--R2--+-----|+\ D |
. | | | >--+--R6-- G |
. | | ,--|-/ | S |
. | | | | === C1 | |
. | | | | | | |
. +-----R3--|--+----|---+---R5----+ |
. | | | | |
. | | | R7 |
. | | | | |
. | '--R4---+-------------+-------+
| _____________
SPCO o | |-------LOAD+
Switch /------------|Voltage sense|
o/ o |_____________|-------LOAD-
| |
Vref--+ +--LOW-LVL GND

If the voltage across LOAD+/- is below a certain level
then the bottom ends of the R3's are switched to Vref.
Could be a relay, or solid state.
 
R

Roy L. Fuchs

Jan 1, 1970
0
thats a very real possibility :)


what you need to do is toss in something to detect a no battery
condition, and clamp your setpoint to zero. When a load comes along
(easy to tell as its a battery) you can then let go of the reference
pin, and away it goes.

Something a control guru pointed out to me years ago was that *NO*
controller can follow a step, ever. One important part of building a
real-world controller is some form of ramp limiting on the reference, so
you never ask for the impossible. In your case, an LM339 and a cap would
do the trick.

Cheers
Terry

Have any of you guys ever heard of a "transzorb"?

One can also place a small ferrite bead directly on the lead of the
FET to assist.
 
T

Terry Given

Jan 1, 1970
0
Roy said:
Have any of you guys ever heard of a "transzorb"?

One can also place a small ferrite bead directly on the lead of the
FET to assist.

how is a transorb or a ferrite bead going to alter the fact that, sans
battery, the opamp saturates?

Cheers
Terry
 
J

John

Jan 1, 1970
0
what you need to do is toss in something to detect a no battery
So I would use the open-collector output of the LM339 (configured as a
basic comparator, probably with hysteresis) to pull the pin ref.
voltage to the servo loops down to ground (almost) when the battery
was removed.....cool. :)

Vref of the LM339 would go to some low voltage (below 0.5V, the lowest
I'd ever take a battery), perhaps the servo loop Vref which is always
less than 0.2V. And Vin of the LM339 would go to the positive LOAD
terminal to detect the battery voltage.

Not sure where the cap you mentioned would go though. On the output
of the LM339 to slow the rise of the reference voltage when the
battery was attached?

John
-- remove SPAMMENOT for e-mail responses --
 
J

John

Jan 1, 1970
0
Perhaps the mod below.
I like it...thanks Tony!
I never cease to be amazed at how logical and simple (and often very
obvious, in hindsight) a solution can be when someone else points it
out. Racked my brains on this one. :)

John
-- remove SPAMMENOT for e-mail responses --
 
J

John

Jan 1, 1970
0
So I would use the open-collector output of the LM339 (configured as a
Whoops, maybe not?

The low-level output voltage of the comparators I've been taking a
peek at is 400mV to 750mV. Since my servo loop reference voltage
ranges from GND to 125mV, I think I'm in trouble. I won't be able to
pull the reference voltage down at all.

I guess I need an open-collector or open-drain output that can go down
to almost GND, within a couple of millivolts, with a load of 1mA max.
(typically 0.5mA or less).

Or have the comparator drive a FET? An IRFL014 would only have a Vds
of 0.2mV at 1mA. I would drive it with an inverting comparator.

Hmm....not sure if the low-level output voltage of the comparator
would be low enough to not bias the FET gate enough for that 0.5mA to
1mA of Vref current to pass through.

I could go to a reed relay instead of a FET but that would require
debouncing the output with a cap? I don't want Vref for the servo
loops bouncing all over the place.

John
-- remove SPAMMENOT for e-mail responses --
 
T

Tony Williams

Jan 1, 1970
0
Whoops, maybe not?
The low-level output voltage of the comparators I've been taking
a peek at is 400mV to 750mV. Since my servo loop reference
voltage ranges from GND to 125mV, I think I'm in trouble. I
won't be able to pull the reference voltage down at all.

Shift what the comparator does.

The maximum demand voltage to all +ve inputs is
208mV. So leave Vref alone and use the comparator
to bias all opamp -ve inputs to greater than 208mV
instead. This fakes an apparent full-scale feedback
voltage from the current shunt, and all opamps go
to zero voltage output onto the FET gates.

--+--5v
|
_ [10k?]
--|- \ |
|Comp---+-------[560k]--> Junction R3,R5.
--|+_/ |
| +-------[560k]--> Junction R3,R5.
LOW-LVL GND |
+-------[560k]--> Junction R3,R5.

Arrange the Comparator output polarity to be Low for
normal operation and High when there is no voltage
between LOAD+ and LOAD-.

In normal operation a 560k in parallel with R3 will
change the pot scaling slightly, but not important.
 
T

Tony Williams

Jan 1, 1970
0
Tony Williams said:
--+--5v
|
_ [10k?]
--|- \ |
|Comp---+--|>|--[470k]--> Junction R3,R5.
--|+_/ |
| +--|>|--[470k]--> Junction R3,R5.
LOW-LVL GND |
+--|>|--[470k]--> Junction R3,R5.
In normal operation a 560k in parallel with R3 will
change the pot scaling slightly, but not important.

To avoid this (and any other side effects in normal
operation) use diodes in series with the bias current
resistors.
 
J

John

Jan 1, 1970
0
The low-level output voltage of the comparators I've been taking
a peek at is 400mV to 750mV. Since my servo loop reference
voltage ranges from GND to 125mV, I think I'm in trouble. I
won't be able to pull the reference voltage down at all.

Shift what the comparator does.

The maximum demand voltage to all +ve inputs is
208mV. So leave Vref alone and use the comparator
to bias all opamp -ve inputs to greater than 208mV
instead. This fakes an apparent full-scale feedback
voltage from the current shunt, and all opamps go
to zero voltage output onto the FET gates.

--+--5v
|
_ [10k?]
--|- \ |
|Comp---+-------[560k]--> Junction R3,R5.
--|+_/ |
| +-------[560k]--> Junction R3,R5.
LOW-LVL GND |
+-------[560k]--> Junction R3,R5.

Arrange the Comparator output polarity to be Low for
normal operation and High when there is no voltage
between LOAD+ and LOAD-.

In normal operation a 560k in parallel with R3 will
change the pot scaling slightly, but not important.

Thanks Tony!

I wasn't able to figure out how the 208mV figure was derived but I
think I understand enough to add the circuit to my breadboard of the
active load and play around with it. I'm pretty sure I have a LM339
and/or LM311 around here somewhere.

I'll let you know how it goes.

John


-- remove SPAMMENOT for e-mail responses --
 
J

John

Jan 1, 1970
0
--+--5v
|
_ [10k?]
--|- \ |
|Comp---+--|>|--[470k]--> Junction R3,R5.
--|+_/ |
| +--|>|--[470k]--> Junction R3,R5.
LOW-LVL GND |
+--|>|--[470k]--> Junction R3,R5.

In normal operation a 560k in parallel with R3 will
change the pot scaling slightly, but not important.

To avoid this (and any other side effects in normal
operation) use diodes in series with the bias current
resistors.

I've got some 11DQ05 Schottky's I can stick in, thanks.

John
-- remove SPAMMENOT for e-mail responses --
 
T

Tony Williams

Jan 1, 1970
0
John said:
I wasn't able to figure out how the 208mV figure was derived but
[snip]

Abs Max opamp +ve input voltage is when the pot is
right at the top and is..... 1.25*R4/(R2+R4),
where R2= 49.9k and R4= 10k.
 
J

John

Jan 1, 1970
0
I wasn't able to figure out how the 208mV figure was derived but
[snip]

Abs Max opamp +ve input voltage is when the pot is
right at the top and is..... 1.25*R4/(R2+R4),
where R2= 49.9k and R4= 10k.

Ack...of course.
And I KNEW that my max was around 0.2V, I designed that in! Amazing
how I can zero in on something like "208mV" and lose the big picture.
<deep sigh>

Thanks Tony,
John
-- remove SPAMMENOT for e-mail responses --
 
J

John Larkin

Jan 1, 1970
0
Something a control guru pointed out to me years ago was that *NO*
controller can follow a step, ever.

That's because there's no such thing as a step, ever.

John
 
J

John

Jan 1, 1970
0
--+--12v
|
_ [10k?]
--|- \ |
|Comp---+--|>|--[470k]--> Junction R3,R5.
--|+_/ |
| +--|>|--[470k]--> Junction R3,R5.
LOW-LVL GND |
+--|>|--[470k]--> Junction R3,R5.

In normal operation a 560k in parallel with R3 will
change the pot scaling slightly, but not important.

To avoid this (and any other side effects in normal
operation) use diodes in series with the bias current
resistors.


I set up an inverting comparator with hysteresis and it works
great...very cool!

I was thinking that instead of biasing the op-amp inputs with the
output of the comparator that I could essentially switch Vref (to the
servo loops) on/off by using the output of the comparator as the
source for the voltage reference. Since the output of the comparator
is a lot higher than 1.235V reference, I'd still get a nice steady
reference voltage when the comparator is high. And the current draw
from the comparator would be pretty low too.

Not sure if this will work but I'll give it a try. I like the idea
though as it would reduce my component count a bunch as I scale the
active load up in size/power (at least 12 FETs, each with its own
servo loop).

John
-- remove SPAMMENOT for e-mail responses --
 
Top