J
John
- Jan 1, 1970
- 0
I believe I've found a cause for at least one of my FET-popping
incidents. When the circuit is powered up and the battery to be
drained is not connected to the LOAD+ and LOAD- terminals, the op-amp
is driving the FET gates hard. If I now connect the battery, one heck
of a current spike flows thru the FET for a short time until the servo
loop can bring the current back down. This can't be good for the FET
and probably popped at least one of them due to movement (intermittent
contact) of the battery connections in my earlier prototype when I was
hooking up the scope (or whatever).
I've been playing with the circuit in LTSpice (thanks again Terry!)
and have not been able to find a way to slow down the circuit enough
to prevent this spike. I've tried caps on the inv. and noninv. inputs
of the op-amp, increasing the size of the gate cap and res. and
placing a cap at the LOAD+ pin....no luck. Is it possible to prevent
this spike?
John
-- remove SPAMMENOT for e-mail responses --
incidents. When the circuit is powered up and the battery to be
drained is not connected to the LOAD+ and LOAD- terminals, the op-amp
is driving the FET gates hard. If I now connect the battery, one heck
of a current spike flows thru the FET for a short time until the servo
loop can bring the current back down. This can't be good for the FET
and probably popped at least one of them due to movement (intermittent
contact) of the battery connections in my earlier prototype when I was
hooking up the scope (or whatever).
I've been playing with the circuit in LTSpice (thanks again Terry!)
and have not been able to find a way to slow down the circuit enough
to prevent this spike. I've tried caps on the inv. and noninv. inputs
of the op-amp, increasing the size of the gate cap and res. and
placing a cap at the LOAD+ pin....no luck. Is it possible to prevent
this spike?
John
-- remove SPAMMENOT for e-mail responses --