Take particular care to note that unless you are using one of the most
recent versions of Altium Designer (AD 2004 SP4 or AD6), if you use the
Component Creation Wizard to create a footprint for a surface mount
capacitor (or a surface mount diode or a surface mount resistor), then the
pads for that footprint will be incorrectly specified.
To be more specific, although the appropriate dimensions will be correctly
specified for each pad's Top layer, that will NOT the case for their Mid and
Bottom layers as well, which will have ZERO values assigned to them instead.
Each of those pads will also have a 'Top-Middle-Bottom' value assigned to
their 'Padstack Mode' property instead of the correct 'Simple' value, and if
any copy of such a "compromised" component is subsequently flipped to the
bottom side of a PCB (within a PCB document file), then the properties
dialog for either of such a component's pads will display ZERO values for
that pad's X-Size and Y-Size properties. (That is *another* bug; in the case
of a pad on the Bottom (copper) layer, the values which *should* be
displayed are those assigned to the pad's Bottom layer - but the values
which currently *are* being displayed are those assigned to the pad's Top
layer instead.)
And yet *another* bug, which "features" in *all* versions of AD 2004 (and
some or all of the preceding DXP versions as well?), results in the outcome
that whenever one or more thus "compromised" components are located on the
bottom side of a PCB, then the Gerber file created from the contents of the
Bottom Paste Mask layer will be incorrect; images of the "compromised" pads
will NOT be depicted within that file. Be warned: I have heard of a case
where a user was bitten by that bug, and who subsequently had to have
another solder paste stencil manufactured.
Moral of the story: if you are using a "problematic" version of Altium
Designer (or earlier major versions), either *don't* use the Component
Creation Wizard to create footprints for surface mount capacitors, diodes,
or resistors, or if you do, rectify all of the "rogue" pads before placing
any instances of any of the footprints concerned into PCB document files.
(The easiest way would probably be to select both of the pads for each
footprint concerned, then use the Inspector Panel to change the Layer
property of those pads from the Top (copper) layer to the MultiLayer layer,
and then use the Inspector Panel again to change the Layer property of those
pads from the MultiLayer layer back to the Top (copper) layer again. (Those
procedures will work because whenever the Layer property of any pad is
changed from the MultiLayer layer to any other layer, then the pad will
subsequently ALWAYS acquire a 'Simple' value for its 'Padstack Mode'
property, which is of course what is desired in these circumstances.))
Veterans of Altium Designer (and preceding versions, such as DXP, Protel 99
SE, etc) are of course well aware that there are a number of "gotchas"
associated with these applications (many of which have still yet to be
rectified), and as such, subsequently check all Gerber files and NC Drill
files created from PCB files (prior to sending them to PCB manufacturers)
very, very, carefully...
Regards,
Geoff Harland.
[email protected]
(Transpose m & s in address
provided - then also remove
cuberoot of 10^3 + 9^3 - 1^3.)
