Terry Pinnell said:
it?
<snip PWL>
I've since discovered that if I use the alternative CM macromodel,
'555' instead of the component model 'UA555', your circuit simulates
OK (with my PWL as well as yours).
Where was that PWL applied in your simulation? As it's -ve going, I
assume it is direct to the LH side of your 1uF? Mine was +ve going,
and went via an intermediate VCVS. I suppose that was redundant, but I
assume it's immaterial here.
FWIW, here's my PWL. Similar order of bounce duration to yours, but
with bouncing on both open and close.
+ 0 0
+ 1m 0
+ 1.1m 5
+ 1.5m 5
+ 1.6m 0
+ 1.7m 5
+ 5m 5
+ 5.1m 0
+ 10m 0
+ 10.01m 5
+ 1.6s 5
+ 1.601 0
+ 1.61 0
+ 1.611 5
+ 1.62 5
+ 1.63 0
The PWL file I posted starts with an open switch, waits a second
before opening the switch, then waits another second before closing
the switch again. Both the closing and opening bounce for a bit. I
don't really know whether the bounce profile is accurate, but it seems
to work with both of the 555 models.
I've read that switch bouncing occurs over a period of 1ms, from 10 to
100 times. That is, the switch bounces 10 to 100 times, with a
frequency between 10kHz and 100kHz. My bounce.pwl file has it bouncing
with 500Hz frequency over a period of 10ms. Yours has it bouncing with
50Hz frequency a couple of times. I'm guessing thats the difference.
If you scope the trigger node using your PWL file, you see that the
trigger input gets down to 2V on the switch opening... I'm not sure
why the models differ in their response to this; the mono should
trigger in both cases.
Anyway, I believe the circuit works properly. If resiliency to longer
bounces is required, a larger time constant can be used by increasing
either the cap or 10k resistor. Increase the 100k resistor in
proportion to the increase in the 10k resistor. For example, changing
the 10k to a 22k, and the 100k to a 220k makes the circuit simulate
properly with your PWL file, at least for me.
Regards,
Bob Monsen