MC6802 IRQ Pulse

[JWHassler]

The only (partial) schematic I have seen appeared in post #7. It shows the 555 connected as a free-running astable oscillator with its output on pin 3 connected to the active-low IRQ input on pin 4 of the 6802. What does a Valid Memory Address have to do with the 555?

Well... d'oh. Misread the schematic, as has happened before.
The 555 is indeed astable, and every time its output goes low, the instruction sequence:
clr 0x2E
rti
... occurs.
Make of that what you can. Perhaps there is a peripheral at that address, although it is also in the on-board SRAM.

 

[Danno]

No peripheral at that address 6802 internal RAM, so it's clearing the RAM at that address on the IRQ.

 

[Danno]

It appears to be a sync timing pulse, keeping everything working at a set time and speed. If the ram isn't cleared and reaches a certain value then a subroutine is called, haven't worked out what it does at this point though.