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Meter schematic - fsm3.jpg (0/1)

Y

YD

Jan 1, 1970
0
On Mon, 29 Dec 2003 07:59:29 -0700, Jim Thompson

Silicon, NPN

Beta = 99

IS = 8.7282fA

kT/q = 26mV

Ignore current crowding, leakage and Early effect.

Accurate description of how you got your answers, NO SWAGs.

Okay, substituting your values in the E-M equation:

Ic=8.7282^-15 [exp (0.65/26^-3)-1]

gives: Ic=22.4mA

Ib=Ic/99=0.226mA



Do I get to keep my ass?

Nope! You "performed" precisely to expectation ;-)

Why? What exactly is wrong with it? You said not to worry about the
Early effect.

You have knowledge but still lack understanding. Or something like
that, it's a bit of a Zen thing here, little cricket. You can't have
avoided seeing the 1k but its meaning failed to register. Don't take
this the wrong way, I wish to encourage you, but you'd do much better
giving those textbooks a crack instead of spending all your free time
on usenet and simulators. Take those simple circuits, like the one
above, pick them apart, see where the currents go and what the
voltages are. Try to reason why they're designed this way or that.
Think them over while out for a walk or watching the TV news. Forget
about them, they'll come back in due time. Don't force it, many of my
insights have come after giving up for the moment and letting my brain
cool off for a bit.

- YD.
 
A

analog

Jan 1, 1970
0
John said:
I probably should not post a design this late at night, but here is
my attempt at the field strength meter. The inductor on the input
is a stiff few turn coil of largish diameter to act as an antenna,

That should work and minimize overall size of the assembly, although
perhaps with not as much antenna gain if a quarter wave whip were to
be used. A whip could be coupled in through the resonant capacitor
on the input if it swapped positions in the schematic with the
inductor.
while the other three are 3 pieces of 30 gauge wire wrap wire wound,
together through a two hole core, like those used for baluns. At
least this shows you can get some voltage gain out of two slow
transistors. I set the AC input to 1 volt, so the responses can be
displayed directly as voltage gain.

The sensitivity is no where near 50 uv full scale, but that is way
too sensitive for use near a transmitter, in my opinion. It pegs at
about 20 mv but should show a noticeable deflection at less than 1 mv.
The sensitivity could be higher by leaving out the resistor in series
with the meter (R2), but then it is a lot less linear. I'll post the
schematic without comment on a.b.s.e.

I like the clever way you have arranged D3 and R6 to limit meter
current =(9V+5V)/(150k+10k) = 88ua. 100k or so for R6 would still
protect the meter, but allow full scale to be reached. Also you could
cancel the small output offset at zero signal by biasing the two output
diodes to run at the same quiescent current as D3.

In the resonant load for Q2, the 7pF of C8 actually only supplies a
fraction of the total capacitance loading the node (the rest coming
from Q2 Ccb, the parasitics of L1, L5 and L6, and the junction
capacitance D1 and D2. This makes resonant gain sensitive to these
secondary capacitances, which could be ok for a single unit.

Biasing for the cascoded transistors is beta dependent and they are
running the somewhat unnecessarily high current of around 10ma.
However both of these things are easily fixed by inserting a biasing
impedance between the emitters of the two transistors (current only
needs to be around 2ma to get enough GBW).

I've reworked these changes and a few more into your schematic.
Here's the LTspice file. (Note: the gain table is slightly stale).
_____________

Version 4
SHEET 1 948 680
WIRE 32 352 48 352
WIRE 144 400 144 432
WIRE 144 304 144 288
WIRE 272 176 352 176
WIRE 272 176 272 144
WIRE -272 48 -272 64
WIRE -80 192 -80 208
WIRE -80 -64 -80 -48
WIRE 48 16 48 48
WIRE 416 400 432 400
WIRE -80 -64 -176 -64
WIRE -176 -16 -176 -64
WIRE -176 64 -176 112
WIRE -176 192 -176 112
WIRE -176 352 -176 272
WIRE -176 352 -80 352
WIRE -80 448 -80 464
WIRE -176 448 -176 464
WIRE -80 384 -80 352
WIRE -176 368 -176 352
WIRE 432 288 432 400
WIRE 432 288 416 288
WIRE 352 400 240 400
WIRE 448 288 432 288
WIRE 528 288 544 288
WIRE 240 48 240 288
WIRE 144 -48 144 -64
WIRE 144 48 48 48
WIRE 144 48 144 64
WIRE 144 -64 48 -64
WIRE 48 -64 48 -48
WIRE 48 288 48 256
WIRE 48 448 48 480
WIRE 48 560 48 576
WIRE -272 -32 -272 -64
WIRE -272 -64 -176 -64
WIRE 48 384 48 352
WIRE 48 352 80 352
WIRE 448 176 432 176
WIRE 528 176 544 176
WIRE 432 400 448 400
WIRE 272 32 272 48
WIRE 272 64 272 48
WIRE 272 48 352 48
WIRE 144 48 144 32
WIRE 272 -64 272 -48
WIRE 272 -64 352 -64
WIRE 416 48 432 48
WIRE 432 48 432 -64
WIRE 432 -64 416 -64
WIRE 416 176 432 176
WIRE 432 176 432 48
WIRE 528 -64 544 -64
WIRE 544 288 544 176
WIRE 544 400 528 400
WIRE 448 -64 432 -64
WIRE -80 16 -80 32
WIRE -80 112 -176 112
WIRE -80 -64 48 -64
WIRE 80 112 -80 112
WIRE -48 352 -80 352
WIRE 144 192 144 176
WIRE 144 288 48 288
WIRE 144 288 144 272
WIRE 48 192 48 176
WIRE 48 176 144 176
WIRE 144 176 144 160
WIRE 144 -64 240 -64
WIRE 240 -64 240 48
WIRE 240 48 272 48
WIRE 352 288 240 288
WIRE 240 288 240 400
WIRE -80 112 -80 128
FLAG 144 432 0
FLAG -176 464 0
FLAG -272 64 0
FLAG 544 400 0
FLAG 48 576 0
FLAG -80 464 0
FLAG 544 -64 0
FLAG -80 208 0
FLAG -80 32 0
SYMBOL npn 80 64 R0
WINDOW 0 64 32 Left 0
WINDOW 3 64 64 Left 0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 48 464 M0
WINDOW 123 -48 48 Right 0
WINDOW 39 -48 80 Right 0
WINDOW 0 -48 16 Right 0
WINDOW 3 -48 112 Right 0
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=33
SYMATTR InstName V2
SYMATTR Value SINE(0 100m 40e6 10u)
SYMBOL pnp 80 400 M180
WINDOW 0 64 64 Left 0
WINDOW 3 64 32 Left 0
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL ind -64 368 R270
WINDOW 3 5 56 VBottom 0
WINDOW 0 32 56 VTop 0
SYMATTR Value 330n
SYMATTR InstName L1
SYMATTR SpiceLine Rser=1 Rpar=1000
SYMBOL res 432 192 R270
WINDOW 3 0 56 VBottom 0
WINDOW 0 32 56 VTop 0
SYMATTR Value 380
SYMATTR InstName Rmeter
SYMBOL res -192 -32 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL res -192 176 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap -96 -48 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL cap 32 192 R0
SYMATTR InstName C5
SYMATTR Value 10n
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL res -192 352 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap -96 384 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL cap -96 128 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL ind2 256 -64 R0
SYMATTR InstName L2b
SYMATTR Value 470n
SYMATTR SpiceLine Rser=1 Rpar=10000 Cpar=2p
SYMBOL ind2 256 48 R0
SYMATTR InstName L2c
SYMATTR Value 470n
SYMATTR SpiceLine Rser=1 Rpar=10000 Cpar=2p
SYMBOL ind2 128 -64 R0
SYMATTR InstName L2a
SYMATTR Value 470n
SYMATTR SpiceLine Rser=1 Rpar=10000 Cpar=2p
SYMBOL cap 32 -48 R0
WINDOW 0 25 8 Left 0
SYMATTR InstName C4
SYMATTR Value 7p
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL cap 32 384 R0
SYMATTR InstName C6
SYMATTR Value 22p
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL schottky 352 -80 M90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 352 192 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 352 64 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C7
SYMATTR Value 1n
SYMBOL res 432 304 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL schottky 352 304 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D3
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 432 416 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R7
SYMATTR Value 100k
SYMBOL cap 352 416 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C8
SYMATTR Value 1n
SYMATTR SpiceLine Rser=10m Lser=10n
SYMBOL res 432 -48 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value 50k
SYMBOL res 128 176 R0
SYMATTR InstName R4
SYMATTR Value 470
SYMBOL Misc\\battery -272 -48 M0
WINDOW 0 32 16 Left 0
WINDOW 3 32 80 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 32 104 Left 0
SYMATTR InstName V1
SYMATTR Value 9V
SYMATTR SpiceLine Rser=10
TEXT -360 504 Left 0 !;op
TEXT -360 568 Left 0 !;ac dec 100 1e6 100e6
TEXT -360 536 Left 0 !.tran 0 30u 0
TEXT 208 -96 Center 0 !K1 L2a L2b L2c .7
TEXT -288 120 Center 0 ;Vpeak Imeter\n_320mv 82ua\n100mv 61ua\n32mv 53ua\n10mv 24ua\n3.2mv 6.4ua\n1.0mv 1.0ua\n.32mv .11ua
 
I

Ian Bell

Jan 1, 1970
0
mike said:
I think we're in heated agreement. My objection is that too many
"designers" start plugging numbers into a simulator without even a clue
as to how many stages of amplification they're likely to need. They end
up with a design that looks good in the simulator, but can't be
sustained in production.
mike

Precisely.

Ian
 
I

Ian Bell

Jan 1, 1970
0
John said:
I believe you. Taking an immediate dislike to people is a special
talent you have demonstrated, here. I am amazed at the energy you
sometimes invest in this process. Happily, it is obviously not your
only talent. I am pretty slow to develop dislike, but have gotten
there a few times. I give people lots of benefit of the doubt in case
they are having a bad day, week or month, but eventually, I can reach
the conclusion that they are just energy suckage.

The few times I interviewed for a job, I dressed like a hippy as a way
to test prospective employers who might be somewhat like you in this
'immediate dislike' regard. The results were faster than John
Larkins simple circuit. Either they hated me, or they at least
pretended to try to find out something else about me. I almost got
thrown out of one place. But first, I got to talk with the man who
actually needed some engineering help, and he voted to take me, over
his boss's (the one who wanted me thrown into the street and who
dressed like an undertaker) objection.

Trouble is, this cuts both ways. First impressions *are* important. My
personal view is that design engineering staff are a companies most
valuable asset. When I was recruiting I took a lot of time over CVs and
would spend on average two or three hours interviewing a candidate
(although nealy half of this was me telling them about the company and the
job). We *always* paid travelling expenses. This is in the UK

I suspect this over rosy CV may be a US thing. I only remember one instance
where I interviewd someone who bore no resemblance to his CV and we had
paid for his return flight from/to the US.

Ian
 
J

Jim Thompson

Jan 1, 1970
0
Trouble is, this cuts both ways. First impressions *are* important. My
personal view is that design engineering staff are a companies most
valuable asset. When I was recruiting I took a lot of time over CVs and
would spend on average two or three hours interviewing a candidate
(although nealy half of this was me telling them about the company and the
job). We *always* paid travelling expenses. This is in the UK

I suspect this over rosy CV may be a US thing. I only remember one instance
where I interviewd someone who bore no resemblance to his CV and we had
paid for his return flight from/to the US.

Ian

I doubt that exaggeration is a USA-only trait.

I would certainly expect most hiring managers to be able to see thru
such exaggerations. And be likely to talk to the candidate by phone
before paying for a trip (BTW quite common in the USA).

I hired a hippy once... a real one... not just dressed as one (ten
years my senior). He knew his stuff quite capably, except that he
took simulations too seriously (this was "in-the-beginning" when
models sucked).

...Jim Thompson
 
P

Paul Burridge

Jan 1, 1970
0
You have knowledge but still lack understanding. Or something like
that, it's a bit of a Zen thing here, little cricket. You can't have
avoided seeing the 1k but its meaning failed to register. Don't take
this the wrong way, I wish to encourage you, but you'd do much better
giving those textbooks a crack instead of spending all your free time
on usenet and simulators. Take those simple circuits, like the one
above, pick them apart, see where the currents go and what the
voltages are. Try to reason why they're designed this way or that.
Think them over while out for a walk or watching the TV news. Forget
about them, they'll come back in due time. Don't force it, many of my
insights have come after giving up for the moment and letting my brain
cool off for a bit.
- YD.

Good advice, I'm sure - and I *know* it. Most of the problem is that
Usenet has always been a bit too addictive for my liking, hence the
books tend to slip to the back-burner.
However, even I'm embarassed with the 'effort' I put forward here
earlier. Now I'm rapidly regaining my former health I'm optimistic
that I'll be able to tackle *properly* the next one which I believe
Jim T's shortly going to be posting...
Never say die!
 
P

Paul Burridge

Jan 1, 1970
0
You forgot about the 1 k resistor. Assuming it's a short to ground and
power supplies without current limiting the solution turns out to be
Vc=10V, Vb=5V, Ib=0A, Ic=0A shortly after turn-on.

Not quite sure what you mean by the above. :-|
I reworked this example again last night using the values Jim gave and
got the following:

Ic=4.67mA
Ie=4.717mA
Ib=0.0472

There was still something not quite right WRT Vbe so I've chucked it
in the bin to wait for Jim's offering.
 
J

John Popelish

Jan 1, 1970
0
analog said:
I like the clever way you have arranged D3 and R6 to limit meter
current =(9V+5V)/(150k+10k) = 88ua. 100k or so for R6 would still
protect the meter, but allow full scale to be reached. Also you could
cancel the small output offset at zero signal by biasing the two output
diodes to run at the same quiescent current as D3.

Glad you appreciated that. I hate to slap meters past full-scale.
In the resonant load for Q2, the 7pF of C8 actually only supplies a
fraction of the total capacitance loading the node (the rest coming
from Q2 Ccb, the parasitics of L1, L5 and L6, and the junction
capacitance D1 and D2. This makes resonant gain sensitive to these
secondary capacitances, which could be ok for a single unit.

I was assuming that the 7 pf would be a small piston trimmer that
would be peaked at the detection frequency. likewise for the input
capacitor.
Biasing for the cascoded transistors is beta dependent and they are
running the somewhat unnecessarily high current of around 10ma.
However both of these things are easily fixed by inserting a biasing
impedance between the emitters of the two transistors (current only
needs to be around 2ma to get enough GBW).

I was going to spring this as a gain adjustment that has little effect
on the tuning. A 200 ohm 1/4" trimmer resistor between the emitters
is what I have been simulating.

(snip)

I will look over your additions.
 
Y

YD

Jan 1, 1970
0
Not quite sure what you mean by the above. :-|
I reworked this example again last night using the values Jim gave and
got the following:

Ic=4.67mA
Ie=4.717mA
Ib=0.0472

There was still something not quite right WRT Vbe so I've chucked it
in the bin to wait for Jim's offering.

Just kidding around a bit :) The way you presented your first
solution seemed to assume a grounded emitter. Apply 5V to the base
without current limiting and see what happens. Do it on a breadboard
with real parts as the simulator will only give some funny numbers.

- YD.
 
P

Paul Burridge

Jan 1, 1970
0
Just kidding around a bit :) The way you presented your first
solution seemed to assume a grounded emitter.

Indeed. That was a combination of people's reluctance to snip postings
properly and my own carelessness (brought about by illness in this
instance).

Apply 5V to the base
without current limiting and see what happens. Do it on a breadboard
with real parts as the simulator will only give some funny numbers.

Okay, but it performs according to expectations with the emitter
resistor in situ as it should have been.
Thanks,

p.
 
M

Mark Zenier

Jan 1, 1970
0
Thanks, John. Looks like people my me who want to build a fsm will not
be spoiled for choice!

Also google back thru rec.radio.amateur.homebrew, Tom Bruhns posted
an interesting one about four years ago. (As I remember. Given the
way my memory is working these days, that could be any date between
when the group was created and last week).
I hope newbies reading this group will realise this apparent obsession
with fsms is not representative of the normal trafffic on the group
(which constitute personal insults, politics, recipe exchanging and
weather reports). :)

Hey, any on topic discussion is better than the weather in Phoenix.

Mark Zenier [email protected] Washington State resident
 
I

Ian Bell

Jan 1, 1970
0
Jim Thompson wrote:

snip
I doubt that exaggeration is a USA-only trait.

i can onl go by my own experience but I suspect you are right.
I would certainly expect most hiring managers to be able to see thru
such exaggerations.

In ,most cases you never get to find out because presumably if you see thru
then you don't interview them.


And be likely to talk to the candidate by phone
before paying for a trip (BTW quite common in the USA).

less common in the UK where everything is much closer (whole of the Uk is
roughly the same size and shape and population as California - though not
quite as sunny).
I hired a hippy once... a real one... not just dressed as one (ten
years my senior). He knew his stuff quite capably, except that he
took simulations too seriously (this was "in-the-beginning" when
models sucked).

I am retired now (at 50) but my last MD wore a beard as did many of us.
Pony tails were not uncommon. Most people dressed casualy, even the MD
wore jeans, and many wore shorts in the summer. We did dress up in suits
to meet the clients though.

One of my colleagues became the MD of a spin off company we set up whcih was
later floated on the stock exchange (which is how I managed to retire
early) and he hated wearing a tie. Thru all the meetings with investment
institutions and even interviews on CNN he never wore a tie.

Ian
 
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