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MOS as switche.

B

boki

Jan 1, 1970
0
MOS

Width + , Resistance - , Charge injection +
Width - , Resistance + , Charge injection - => Use paralle MOS, chip
area +

Fully-differential input, charge injection -, OP power + (than
single-end), chip area +, and need CMFB, chip area +.

High sampling clock, charge injection -, but, how high is high enough?

and is there any good method to simulate charge injection?


Thanks a lot!

Boki.
 
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