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Need some advice on RC characteristics of Slope ADC

M

Myauk

Jan 1, 1970
0
Hi All,

As I am working on Slope ADC configuration as described by AN863
(http://ww1.microchip.com/downloads/en/AppNotes/00863a.pdf)
Microchip application note AN929 http://ww1.microchip.com/downloads/en/AppNotes/00929a.pdf
, page 3 figure 5 shows Ramp Rate Method where by using a single
Capacitor and a known ref: resistor, the resistance of any unknown
resistor Rx can be measured. The method goes as follows:

1. Connect the supply voltage through the ref: resistor Rref and let
the capacitor chraged until it reaches threshold voltage Vth, the
charge time T1 is recorded.
2. Discharge the capacitor and then connect the supply voltage again
through unknown resistor Rx, and let the capacitor charged until it
reaches threshould voltage Vth, charge time T2 is then recorded.

And theoractically, Rx = (T2/T1) * Rref

I used C = 0.47 uF, Rref = 200 ohms, Vth = 2.02V, Vsupply = 3.08V (I
use PIC18F45k20 port RA1 and RA2 to supply voltage to RC ckt, and RA0
as the comparator input).

Results are not as expected.

When Rref = 200 ohms with C=0.47 uF , time T1 is measured to be 138 us
to reach 2.02V. Again, when Rx = 360,540 ohms, with the same capacitor
0.47uF, time T2 is measured to be 200,292 us. The time Ratios T2/T1
does not match the time ratio in this experiment.

I understand that the source characteristics of the I/O port in the
MCU affects the charge time behaviour but I am not sure how exactly it
relates and I do not know how to model the circuit so as for me to
calculate predictable results.

Any suggestions?

Regards
 
G

George Herold

Jan 1, 1970
0
Hi All,

As I am working on Slope ADC configuration as described by AN863
(http://ww1.microchip.com/downloads/en/AppNotes/00863a.pdf)
Microchip application note AN929http://ww1.microchip.com/downloads/en/AppNotes/00929a.pdf
, page 3 figure 5 shows Ramp Rate Method where by using a single
Capacitor and a known ref: resistor, the resistance of any unknown
resistor Rx can be measured. The method goes as follows:

1. Connect the supply voltage through the ref: resistor Rref and let
the capacitor chraged until it reaches threshold voltage Vth, the
charge time T1 is recorded.
2. Discharge the capacitor and then connect the supply voltage again
through unknown resistor Rx, and let the capacitor charged until it
reaches threshould voltage Vth, charge time T2 is then recorded.

And theoractically, Rx = (T2/T1) * Rref

I used C = 0.47 uF, Rref = 200 ohms, Vth = 2.02V, Vsupply = 3.08V(I
use PIC18F45k20 port RA1 and RA2 to supply voltage to RC ckt, and RA0
as the comparator input).

Results are not as expected.

When Rref = 200 ohms with C=0.47 uF , time T1 is measured to be 138 us
to reach 2.02V. Again, when Rx = 360,540 ohms, with the same capacitor
0.47uF, time T2 is measured to be 200,292 us. The time Ratios T2/T1
does not match the time ratio in this experiment.

I understand that the source characteristics of the I/O port in the
MCU affects the charge time behaviour but I am not sure how exactly it
relates and I do not know how to model the circuit so as for me to
calculate predictable results.

Any suggestions?

Regards

What's the source impedance driving the RC? (most likely pretty low..
but.)
What's the input impedance of the comparator input?

George H.
 
M

Myauk

Jan 1, 1970
0
What's the source impedance driving the RC?  (most likely pretty low..
but.)
What's the input impedance of the comparator input?

George H.

Hi George,

Thanks for your reply.
May I know if there is any way to find out? The Microchip does not
give me such details.

Regards
 
M

Myauk

Jan 1, 1970
0
What are you using for a switch?  Electronic switches have non-zero
impedances, with some of the less expensive ones (like the CD4051-ish
ones) being over 100 ohms.  If you're using one that has a 50 ohm "on"
resistance, then the math works out pretty well.

It looks like you're using a PIC port to as the switch?  Check the data
sheet -- if they don't say what the effective resistance of the port is
directly, you can approximate it by looking at their rated current and
voltage drop for the pin as a current driver.  PICs are pretty good about
driving lots of current, but I still wouldn't be surprised at 50 ohms.

What are you using for a capacitor?  Electrolytic capacitors -- even
tantalum caps -- leak, and act like resistors in parallel to the cap.
Most capacitors have all sorts of second-order effects that make them act
like they have less capacitance at high frequencies than at low, but I
wouldn't expect _that_ much unless you maybe used the cheapest possible
ceramic.  OTOH, both of the effects that I mentioned would make the high
resistance time longer, not shorter.

If you're using a capacitor with a high ESR (electrolytic, again) or if
you have some resistance in series with the cap after you tap off your
comparator input, then the higher current from the 200 ohm resistor would
raise the capacitor voltage, and make the comparator pop off quicker.

Basically, you need to draw out your _actual_ circuit, then you need to
add in all of the parasitic effects that you can think of, _with values_,
and assess each one to see if you can figure out what is screwing you up.

More empirically, you can substitute a number of different resistance
standards for the 200 ohms, and plot a time vs. resistance chart, then
see if anything jumps out at you.

--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Softwarehttp://www.wescottdesign.com

Hello Tim,

Thanks for your kind reply.

I have got a reply from the original author of the application notes.
He said the microchip I/O ports have about 50-100 ohms of resistance.
Additionally, they have a slew rate limit that prevents them from
activating too fast.

For the case of capacitor I am using NPO Capacitors
http://sg.element14.com/jsp/search/productdetail.jsp?SKU=1679460.

For Modelling such circuits, what are the critical parasitic
parameters for my case? ESL? ESR? Just for clarification, they are the
lumped parameters calculated by the supplier for modelling the
capacitors, right? I mean once I use ESL or ESR I don't need to use
parallel parasitic resistance and inductance parameters any more, I
guess..


Regards
Aung
 
H

hamilton

Jan 1, 1970
0
J

Jamie

Jan 1, 1970
0
John said:
But big values are physically large and expensive. We stock a 22 nF
C0G in 1825 size, and it's expensive and hard to get. Can you actually
buy a 0.47 uF in C0G?

Yes! Digikey has stock on one,

http://www.digikey.com/product-detail/en/C2220H474J5GACTU/399-6525-1-ND/3079154

for $26.91 each. I assume it has good DA performance, which is what
we're after. Tempco doesn't matter here.




Using the best cap is "knee jerk?". You prefer, say, oil-filled paper?
Leyden jars? Electrolytics? Black Beauties?
I was with Semco when they started manufacturing surface mount, fully
encapsulated mica capacitors. At that time, our only customers for those
were military.

At that time, the Japanese were making these caps mostly by hand and
the yield was averaging 50%, yes, I said 50%.. Not good..

Others out there were also making them, but with low yields, too.

I joined them just as they were entering this product line and soon
determine that is was a very difficult product to manufacture. so the
company invested in some hardware. Robotic X,Y,Z with video eyes and
some automation between each step, advanced the process greatly.

By using basic video cams mounted on the arms and corners of the
station, the computer program was able to fully comprehend picking
through a pile of mica chips with a vacuum finger and wand to sort and
pick up each piece. it then was be placed in a contact frame (very small
one) where a HI-POT test took place. Then this sample would be
transferred over to the next step and inserted into a stacking jig..

etc. the nice part about all of this was, the software was intelligent
enough to self correct all the wall to the encapsulation and UV process.

With the use of camera's and software smart enough to know what it's
looking for, it made the mechanical end of this process much more
reliable because the software could self correct position due to
mechanical error or placement error..

All the software was done using Delphi, vender supplied drivers for
the cameras, remote Io etc.

It was a huge success and when the share holders saw this, they seized
the opportunity to sell the business while they had something to offer
and took the money and ran. Ofcourse, it got sold to a India company.

Oh btw, I wrote the main software and did lots of the specialized
automation custom circuits to be joined with commonly available
automation components.

Jamie
 
M

Myauk

Jan 1, 1970
0
If you have the room on the board, use some small switching FETS (or
analog switches, or even bipolar transistors) to turn things on, actuated
by the processor.  You can find ones with on-resistances that are much,
much less than 50 ohms.

--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Softwarehttp://www.wescottdesign.com

Thanks for the suggestion, Tim,

I am trying the swtich action of PMOS circuit which looks something
like this
http://www.google.com.sg/imgres?num...&ndsp=18&ved=1t:429,r:17,s:0,i:122&tx=55&ty=6

The PMOS alone can't prevent the charging condition to the capacitor,
even at turn-off condition, it has some resistance value, and the
capacitor gets charged regardless of VGS. I mean when VGS < VGS(th),
the PMOS switch turns off the circuit alright, but the leakage current
still flows through the source to drain of the PMOS, as a result the
capacitor is still charged. To make the switch action complete, I
think I have to use a complementary pair like this
http://upload.wikimedia.org/wikipedia/commons/8/81/CMOS_Inverter.svg.

Any suggestion?


Regards
Aung
 
J

Jamie

Jan 1, 1970
0
Tim said:
Time must flow backward in whatever corner of the universe you live in,
then.

Have you notified Stephan Hawkings?
I don't know, Jacob Barnett seems to think SH maybe incorrect in his
assumptions..

Jamie
 
J

John S

Jan 1, 1970
0
Hi All,

As I am working on Slope ADC configuration as described by AN863
(http://ww1.microchip.com/downloads/en/AppNotes/00863a.pdf)
Microchip application note AN929 http://ww1.microchip.com/downloads/en/AppNotes/00929a.pdf
, page 3 figure 5 shows Ramp Rate Method where by using a single
Capacitor and a known ref: resistor, the resistance of any unknown
resistor Rx can be measured. The method goes as follows:

1. Connect the supply voltage through the ref: resistor Rref and let
the capacitor chraged until it reaches threshold voltage Vth, the
charge time T1 is recorded.
2. Discharge the capacitor and then connect the supply voltage again
through unknown resistor Rx, and let the capacitor charged until it
reaches threshould voltage Vth, charge time T2 is then recorded.

And theoractically, Rx = (T2/T1) * Rref

I used C = 0.47 uF, Rref = 200 ohms, Vth = 2.02V, Vsupply = 3.08V (I
use PIC18F45k20 port RA1 and RA2 to supply voltage to RC ckt, and RA0
as the comparator input).

Results are not as expected.

When Rref = 200 ohms with C=0.47 uF , time T1 is measured to be 138 us
to reach 2.02V. Again, when Rx = 360,540 ohms, with the same capacitor
0.47uF, time T2 is measured to be 200,292 us. The time Ratios T2/T1
does not match the time ratio in this experiment.

Change Rref to 10k and get back to us.
 
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