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need time delay 555 / 556 circuit help

F

Fiddler

Jan 1, 1970
0
I need a very simple circuit. When it's on, I need it to stay off for
a few seconds, then output a pulse for a few seconds then turn off.
This theoretically could be done with a 556 with both halves working
as monostable oneshot timers. However, when I tried this i had some
weird results. First off, I need this to be triggered when power is
applied to the circuit, not when the trigger pin is activated so I
just tied it to ground.
what happens afterwards is a bit weird. At first, both outputs go
high (from both halves) then the first one times out and triggers the
second one. However, I dont need that initial spike since this needs
to latch a relay after a few seconds wait. The other problem is that
the timing capacitor on the second half of the circuit seems to affect
the delays on both halves.
the one thing so far that i havent checked into is power supply i'm
using. So far I've been testing this w/ a 9v battery (i dont know how
fresh it is).. if the battery is weak, can it cause this kind of an
issue?

My circuit is wired like this:
http://home.cogeco.ca/~rpaisley4/LM555Delays2.GIF
except for the first trigger which is tied to ground.
Is there a way to prevent that initial trigerring of the second part
of the circuit.. or rather keep it intentionally low until the first
half triggers it?

Thanks
 
J

John Fields

Jan 1, 1970
0
I need a very simple circuit. When it's on, I need it to stay off for
a few seconds, then output a pulse for a few seconds then turn off.
This theoretically could be done with a 556 with both halves working
as monostable oneshot timers. However, when I tried this i had some
weird results. First off, I need this to be triggered when power is
applied to the circuit, not when the trigger pin is activated so I
just tied it to ground.
what happens afterwards is a bit weird. At first, both outputs go
high (from both halves) then the first one times out and triggers the
second one. However, I dont need that initial spike since this needs
to latch a relay after a few seconds wait. The other problem is that
the timing capacitor on the second half of the circuit seems to affect
the delays on both halves.
the one thing so far that i havent checked into is power supply i'm
using. So far I've been testing this w/ a 9v battery (i dont know how
fresh it is).. if the battery is weak, can it cause this kind of an
issue?

My circuit is wired like this:
http://home.cogeco.ca/~rpaisley4/LM555Delays2.GIF
except for the first trigger which is tied to ground.
Is there a way to prevent that initial trigerring of the second part
of the circuit.. or rather keep it intentionally low until the first
half triggers it?

---
Yes.

With 556s or 7556s:

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1M] [10K] +---+---+ [1M]
| |__ | | | |__ | |
+----O|TR OUT|-----[100nF]--+--O|TR OUT|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
| +-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [3.3µF] | 1/2 7556 [3.3µF]
| | | | |
GND>--+--+--------------+-----------+--------------+--->GND


or, if you don't like 555s:


VCC>--+-----+----+----+----+
| | | | |
[R1] [R4] | [R5] |
| | | | |
+-----|---|+\ | |
| | | >--+ |
| +---|-/ | |
[R2] | LM393 | |
| +---|+\ | C
| | | >--+---B NPN
+-----|---|-/ E
| | | |
| |+ | +------+
[R3] [C1] | |K |
| | | [CR1] [COIL]
| | | | |
GND>--+-----+----+---------+------+

The LM393 forms a window comparator with a wired-or output which goes
high only when the voltage at the junction of R4 and C1 is more
positive than the voltage at the junction of R2 and R3 and less
positive than the voltage at the junction of R1 and R2. This
condition will only be satisfied during part of the time C1 is
charging to Vcc after Vcc is connected to the circuit, and while the
output is high, current will flow through R5 into the relay coil,
latching it.

If we want the output of the comparators to remain low for three
seconds after power is first applied, then to go high for three
seconds, and finally to go low forever after that, then we must find
to what voltage C1 charges in 3 seconds, then in six seconds, and then
arrange the resistances on the voltage divider R1 R2 R3 so that the
proper voltages appear on the comparator inputs to allow the timing we
want to happen to happen.

Recalling that, in a circuit like this,:

V+
|
[R4]
|
+---V0
|
[C1]
|
0V

When V+ is abruptly connected to R4 the voltage across the capacitor
will rise to about 2/3 of the supply in a time equal to RC, if we say
that we'll let our six second charge point be equal to about 2/3 of
the supply, we can start to figure out the values for R and C. Since
the inputs of the comparators will also be connected to the junction
of R4 and C1, all the current from R4 won't go into the cap but some
of it will be diverted into the comparator inputs or, if the
comparator inputs source current, they will add to the current flowing
into the cap. In any case, whether the comparator inputs sink or
source current, they will contribute to the timing error and must be
considered. Looking at the LM393 data sheet we find that the input
bias current is 500 nA worst case for both inputs and that the inputs
source current, so with a 9V source driving the comparators (and R4)
that corresponds to about 18 megohms in parallel with R4.

Next, we need to look at the leakage current of C1, since that's
current that just gets thrown away and doesn't contribute to the
charging of C1. Since this doesn't seem to be a particularly critical
application, we can probably use a plain old aluminum electrolytic for
C1, and for a time constant of 6 seconds we're in the 1 to 100µF
ballbark, so if we set R1 equal to 1M and take the ~5% error due to
the bias current, we'll need about 6µF to get to 6 seconds.

Looking at Panasonic's aluminum electrolytics reveals that about the
best we can do is 3µA, so with a 1 megohm resistor in there we'll have
a 3V drop across it when the cap charges to 6V, so with not much
headroom, that's pretty iffy.

Searching a little more leads us to their EF series of leaded
tantalums. With a leakage current of 0.008CV or 0.05µA (whichever is
greater) that seems more like it. Going with a 6.8µF 10V unit will
get us


Il = 0.008CV = 0.008*6.8µF*10V = 0.54µA.

Not bad. On top of that, since our comparator inputs are sourcing
current, they'll be supplying some, if not all, of C1's leakage
current, taking some of the timing error away from R4.

OK. Now we've got:


V1
|
[1M]
|
+---V2
|
[6.8µF]
|
0V

Now, to check how long it takes the cap to charge up to 6V, we can
write:

V1 9V
T = RC (ln -------)s = 1Mohm * 6.8µF * ln ------- ~ 7.47s
V1-V2 9V-6V

A little high, but since we can fix the timing with R1 R2 R3, let's
leave it alone.

Now, since we've chosen the high voltage point to be 2/3 of Vcc, Let's
just arbitrarily make R1 = R2 = R3 to force the low voltage point to
be 1/3 Vcc and see what kind of time it takes for C1 to charge up to
3V.

9V
T = 6.8 * Ln ------- ~ 2.76s
9V-3V

A little low, but we can fix it.

How?

By figuring out the voltages on C2 corresponding to exactly 3 seconds
and 6 seconds and adjusting R1, R2, and R3 to put those voltages on
the reference inputs of the comparators.

Read the next exciting installment, due out tomorrow!-)
 
J

John Fields

Jan 1, 1970
0
Read the next exciting installment, due out tomorrow!-)

---
OK, we've got:

V1
|
[1M]
|
+---V2
|
[6.8µF]
|
0V

and we want to find out what voltage on V2 corresponds to 3 seconds,
so if we rewrite



V1
T = RC (ln -------)
V1-V2

to


T = RC K

where K = ln(V1/(V1-V2))


then we can solve for K
by rearranging:


T 3s
K = ---- = --------------- = 0.441
RC 1Mohm * 6.8µF


Then, since K = ln(V1 /(V1-V2)),

0.441 = ln(9V /(9V-V2)).

Also, since 0.441 = ln 1.55,

then 1.55 = 9 /(9-V2), and doing the algebra:

(1.55*9)-(1.55*V2) = 9

13.95 - 1.55*V2) = 9

13.95 - 9 = 1.55*V2

4.95 = 1.55*V2

3.19 = V2


So, it'll take 3 seconds for V2 to charge up to 3.19V.

Repeating the procedure for 6 seconds yields 6.01V for V2, and our
voltage divider starts to take shape:

9V
|
[R1]
|
6s--+---> 6.01V
|
[R2]
|
3s--+---> 3.19V
|
[R3]
|
0V

Now, since we want to drop 3.19V across R3, we could do it if we had a
3190 ohm resistor and we forced 1mA through it. 3160 ohms is pretty
close, so let's try that for starters. Assuming we'll put 1mA through
the string means that 1mA will flow through all of the resistors, so
for R2 we'll need it to drop 6.01V - 3.19V = 2.82V. 2800 ohms is a
standard 1% resistor, and with 1mA through it it'll drop 2.8V, so
that's also prett close to what we want. We've got a 9V supply and we
want to drop that down to 6.01 through R1, so that's 2.99V, and we've
got a 3010 ohm 1% resitor available, so let's use that.

Our voltage divider now looks like this:


9V
|
[3010]
|
V6s--+---> 6.01V
|
[2800]
|
V3s--+---> 3.19V
|
[3160]
|
0V

So the current through the string will be

I = E/R = 9/3010+2800+3160 = 1.003344mA

Pretty good!!!


Now to figure out what the voltages are really going to be,

V3s = 1.003mA * 3160 ohms = 3.17V

which is less than a 1% error, and

V6s = 1.003mA * 5960 ohms = 5.98V

which is also less than a 1% error, so considering that we're dealing
with a +/-10% cap and that the comparator bias currents of 500nA will
contribute less than an additional 0.01% to the reference string
error, were done!

So, here's the final schematic:

9V >--+-----+----+----+----+
| | | | |
[3010] [1M] | [2000] |
| | | | |
+-----|---|+\ | |
| | | >--+ |
| +---|-/ | |
[2800] | LM393 | |
| +---|+\ | C
| | | >--+---B NPN
+-----|---|-/ E
| | | |
| |+ | +------+
[3160][6.8µF] | |K |
| | | [CR1] [COIL]
| | | | |
GND>--+-----+----+---------+------+

One last thing, notice that the timing part of the circuit isn't
sensitive to supply voltage variations since it's ratiometric.

Just like a 555... ;^)
 
R

Rob Paisley

Jan 1, 1970
0
John Fields said:
I need a very simple circuit. When it's on, I need it to stay off for
a few seconds, then output a pulse for a few seconds then turn off.
This theoretically could be done with a 556 with both halves working
as monostable oneshot timers. However, when I tried this i had some
weird results. First off, I need this to be triggered when power is
applied to the circuit, not when the trigger pin is activated so I
just tied it to ground.
what happens afterwards is a bit weird. At first, both outputs go
high (from both halves) then the first one times out and triggers the
second one. However, I dont need that initial spike since this needs
to latch a relay after a few seconds wait. The other problem is that
the timing capacitor on the second half of the circuit seems to affect
the delays on both halves.
the one thing so far that i havent checked into is power supply i'm
using. So far I've been testing this w/ a 9v battery (i dont know how
fresh it is).. if the battery is weak, can it cause this kind of an
issue?

My circuit is wired like this:
http://home.cogeco.ca/~rpaisley4/LM555Delays2.GIF
except for the first trigger which is tied to ground.
Is there a way to prevent that initial trigerring of the second part
of the circuit.. or rather keep it intentionally low until the first
half triggers it?

---
Yes.

With 556s or 7556s:

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1M] [10K] +---+---+ [1M]
| |__ | | | |__ | |
+----O|TR OUT|-----[100nF]--+--O|TR OUT|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
| +-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [3.3µF] | 1/2 7556 [3.3µF]
| | | | |
GND>--+--+--------------+-----------+--------------+--->GND


The RESET terminals in the above circuit need to be tied to the
positive.

Adding the following circuit to the second timer should prevent it
from triggering when the power is applied.

http://home.cogeco.ca/~rpaisley4/LM555.html#10

A 9 volt battery is not a very good power supply for this circuit.

Rob.
 
F

Fiddler

Jan 1, 1970
0
thank you for the in-depth response but I want to remain with the 556.
Your circuit seems a bit odd to me. You're tying both reset pins to
ground which just holds the whole circuit off.. is there a mistake
here or is it me? I followed your circuit on a breadboar dand with
both resets tied to ground nothing happens. however, when i just let
them float, the circuit works as I described above

assume that the delays are :
A (first half of 556): 2 seconds
B (second half of 556): 1 second

graph of A

5v|===================|
| |
V | |______________________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

graph of B

5v|========| |=========|
| | | |
V | |__________| |____________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

what I'm trying to avoid is that firs On state of graph B from 0 to 1
seconds.


basically what i need is a circuit that does this:

5v| |=========|
| | |
V |___________________| |_____________________.._________
0v|___________________________________________________.._________
0 1sec 2sec 3sec 4 sec .. infinity
Time

thank you for your help
 
T

Terry Pinnell

Jan 1, 1970
0
thank you for the in-depth response but I want to remain with the 556.
Your circuit seems a bit odd to me. You're tying both reset pins to
ground which just holds the whole circuit off.. is there a mistake
here or is it me? I followed your circuit on a breadboar dand with
both resets tied to ground nothing happens. however, when i just let
them float, the circuit works as I described above

assume that the delays are :
A (first half of 556): 2 seconds
B (second half of 556): 1 second

graph of A

5v|===================|
| |
V | |______________________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

graph of B

5v|========| |=========|
| | | |
V | |__________| |____________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

what I'm trying to avoid is that firs On state of graph B from 0 to 1
seconds.


basically what i need is a circuit that does this:

5v| |=========|
| | |
V |___________________| |_____________________.._________
0v|___________________________________________________.._________
0 1sec 2sec 3sec 4 sec .. infinity
Time

thank you for your help

That reset wiring must have been just a typo by John. Here's a circuit
to do what you've specified:
http://www.terrypin.dial.pipex.com/Images/Dual555Timer-Fiddler.gif

Note that I've drawn it with two separate 555s for clarity, although
you will presumably use a single 556.
 
J

John Fields

Jan 1, 1970
0
John Fields said:
I need a very simple circuit. When it's on, I need it to stay off for
a few seconds, then output a pulse for a few seconds then turn off.
This theoretically could be done with a 556 with both halves working
as monostable oneshot timers. However, when I tried this i had some
weird results. First off, I need this to be triggered when power is
applied to the circuit, not when the trigger pin is activated so I
just tied it to ground.
what happens afterwards is a bit weird. At first, both outputs go
high (from both halves) then the first one times out and triggers the
second one. However, I dont need that initial spike since this needs
to latch a relay after a few seconds wait. The other problem is that
the timing capacitor on the second half of the circuit seems to affect
the delays on both halves.
the one thing so far that i havent checked into is power supply i'm
using. So far I've been testing this w/ a 9v battery (i dont know how
fresh it is).. if the battery is weak, can it cause this kind of an
issue?

My circuit is wired like this:
http://home.cogeco.ca/~rpaisley4/LM555Delays2.GIF
except for the first trigger which is tied to ground.
Is there a way to prevent that initial trigerring of the second part
of the circuit.. or rather keep it intentionally low until the first
half triggers it?

---
Yes.

With 556s or 7556s:

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1M] [10K] +---+---+ [1M]
| |__ | | | |__ | |
+----O|TR OUT|-----[100nF]--+--O|TR OUT|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
| +-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [3.3µF] | 1/2 7556 [3.3µF]
| | | | |
GND>--+--+--------------+-----------+--------------+--->GND


The RESET terminals in the above circuit need to be tied to the
positive.

---
No, but I did make a mistake. Thanks for waking me up. Here's how
they _should_ be connected:

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1M] [10K] +---+---+ [1M]
| |__ | | | |__ | |
+----O|TR OUT1|-----[100nF]--+--O|TR OUT2|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
+--+-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [3.3µF] | 1/2 7556 [3.3µF]
| | | | |
| +--------------------------+ |
| | |
GND>--+-----------------+--------------------------+--->GND

Notice that this connection will prevent triggering of the second
timer on power-up, but will allow the first timer to trigger on as
soon as the reset voltage to > 1.2V. (regardless of Vcc, BTW) When
the reset voltage rises above 1.2V the trigger input will still be
low, so that will force the output of the first timer to go high and
start timing out because its trigger input will still be active since
the 10nF cap won't yet have charged up to > 1/3 Vcc and won't go
inactive until it gets to 1/3 Vcc. When it does go inactive, the
output will still be timing out, which satisfies the criterion that
the input pulse be narrower than the output pulse.

Now, since the output of the first timer will be high when the reset
input to both timers goes high, _and_ since the second timer's trigger
input will be pulled up to Vcc, it will be impossible for the second
timer to be triggered at that time. However, when the first timer
times out and its output goes low, that low-going edge will be
differentiated by the 100nF cap, the second timer's trigger input will
be pulled low momentarily and the second timer's output will go high
for the period determined by the 1 megohm resistor and the 3.3µF
capacitor; about 3.6 seconds. Since the period of the first timer is
also about 3.6s, that should come close to the OP's request for no
output for 3 seconds after power-up, followed by 3 seconds of output,
followed by no output thereafter. If it doesn't work for him he can
easily change the caps or the resistors to get what he wants, since
T = 1.1RC

Here's the timing:

______________________________________________
PWRON____|
_____________________________________________
RESET_____|
__________
OUT1_______| |_________________________________
__________
OUT2___________________| |_____________________

---
Adding the following circuit to the second timer should prevent it
from triggering when the power is applied.

http://home.cogeco.ca/~rpaisley4/LM555.html#10

---
Thanks, but the fix shown above should work fine. BTW, I noticed that
in almost all of the circuits you have you've allowed the reset input
to float. That's probably not as good as tying it to the positive
supply would be, as you noted above. Noise and high impedance inputs
and all that...
---
 
J

John Fields

Jan 1, 1970
0
thank you for the in-depth response but I want to remain with the 556.
Your circuit seems a bit odd to me. You're tying both reset pins to
ground which just holds the whole circuit off.. is there a mistake
here or is it me?

---
It's a mistake. Sorry about that. :-(
See my earlier post replying to Rob Paisley.
---
I followed your circuit on a breadboar dand with
both resets tied to ground nothing happens. however, when i just let
them float, the circuit works as I described above

assume that the delays are :
A (first half of 556): 2 seconds
B (second half of 556): 1 second

graph of A

5v|===================|
| |
V | |______________________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

graph of B

5v|========| |=========|
| | | |
V | |__________| |____________________..________
0v|__________________________________________________..________
0 1sec 2sec 3sec 4 sec .. infinity
Time

what I'm trying to avoid is that firs On state of graph B from 0 to 1
seconds.


basically what i need is a circuit that does this:

5v| |=========|
| | |
V |___________________| |_____________________.._________
0v|___________________________________________________.._________
0 1sec 2sec 3sec 4 sec .. infinity
Time

---
This ought to do it for you, and will avoid an extra RC for the
second timer's reset:

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1.8M] [10K] +---+---+ [910k]
| |__ | | | |__ | |
+----O|TR OUT1|-----[100nF]--+--O|TR OUT2|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
+--+-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [1.0F] | 1/2 7556 [1.0µF]
| | | | |
| +--------------------------+ |
| | |
GND>--+-----------------+--------------------------+--->GND

Here's the approximate timing:

______________________________________________
PWRON____|
_____________________________________________
RESET______|
__________
OUT1_______| |_________________________________
|<---2s--->|
___________ _______________________________
TRIG2_____| |/
______
OUT___________________| |__________________________
|<-1s->|
 
J

John Fields

Jan 1, 1970
0
This ought to do it for you, and will avoid an extra RC for the
second timer's reset:

Ooops...
The 1F (!) cap in the 2s timer should be 1µF, as shown below, and the
RESET/TR1 timing is a little better illustrated as a slope instead of
an edge, also shown below.

VCC>--+---------+-------+----------+-------+-------+
| | | | | |
[10K] +---+---+ [1.8M] [10K] +---+---+ [910k]
| |__ | | | |__ | |
+----O|TR OUT1|-----[100nF]--+--O|TR OUT2|------->OUT
| | _| | | _| |
| | D|O--+ | D|O--+
| |_ | | |_ | |
+--+-O|R TH|---+ +-O|R TH|---+
| | +-------+ |+ | +-------+ |+
[10nF]| 1/2 7556 [1.0µF] | 1/2 7556 [1.0µF]
| | | | |
| +--------------------------+ |
| | |
GND>--+-----------------+--------------------------+--->GND

Here's the approximate timing:

______________________________________________
PWRON________|
_____________________________________________
RESET/TR1_____/
__________
OUT1___________| |_________________________________
|<---2s--->|
____________ _______________________________
TRIG2________| |/
______
OUT_______________________| |__________________________
|<-1s->|
 
R

Rob Paisley

Jan 1, 1970
0
John Fields said:
---
Thanks, but the fix shown above should work fine. BTW, I noticed that
in almost all of the circuits you have you've allowed the reset input
to float. That's probably not as good as tying it to the positive
supply would be, as you noted above. Noise and high impedance inputs
and all that...

Yes, the RESET should be tied to the supply when not needed and the
CONTROL terminal should be bypassed. There is section of the 555
Timer page that explains this and also why it is not shown on the
diagrams.

http://home.cogeco.ca/~rpaisley4/LM555.html#1

Primarily because the battery's life will be fairly short. For
limited testing purposed a 9 volt battery would be OK. (No mention of
the load for this circuit is given so it is hard to give a definitive
answer.)

Rob.
 
J

John Fields

Jan 1, 1970
0
Yes, the RESET should be tied to the supply when not needed and the
CONTROL terminal should be bypassed. There is section of the 555
Timer page that explains this and also why it is not shown on the
diagrams.

---
Thanks, but rather than bothering to wade through the maze of web
pages offered by everyone as their solutions to all of the world's
problems, I prefer to refer to manufacturer's literature and work it
out for myself.
---

Primarily because the battery's life will be fairly short. For
limited testing purposed a 9 volt battery would be OK. (No mention of
the load for this circuit is given so it is hard to give a definitive
answer.)

---
The load was given as a latching relay and the 9V battery was given as
what was being used by the OP, so there ya go. Even knowing that the
output pulse would only be one second long for every power-on / power
off cycle, not knowing the power -on / power-off duty cycle and the
current the relay would draw would, of course, result in a problem in
determining the battery's life, but using a 7556 with a transistor
used to drive the relay would go a long way toward lengthening the
battery's life if that was, indeed, a problem. Perhaps the OP will
comment on that. If not, I'm perfectly happy to let things remain as
they are presently.
 
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