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Norma; 'boot sequence' for a CPU?

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phil

Jan 1, 1970
0
I'm curious, please indulge me - what is the normal 'boot sequence'
for your average old CPU?

Let's take a Z80 for example - when a board with a Z80 (and relevant
RAM, ROM and support chips) is powered on, what is the sequence of
events that takes place?

Does the CPU, for example, first expect an interrupt from some other
part of the circuit? Does it immediately try and access RAM or ROM via
the address lines? Etc.

Or is there a web site somewhere with this info?

I'd really like to know this as it will help my understanding
considerably.


Thanks
Phil
 
T

Tom Biasi

Jan 1, 1970
0
phil said:
I'm curious, please indulge me - what is the normal 'boot sequence'
for your average old CPU?

Let's take a Z80 for example - when a board with a Z80 (and relevant
RAM, ROM and support chips) is powered on, what is the sequence of
events that takes place?

Does the CPU, for example, first expect an interrupt from some other
part of the circuit? Does it immediately try and access RAM or ROM via
the address lines? Etc.

Or is there a web site somewhere with this info?

I'd really like to know this as it will help my understanding
considerably.


Thanks
Phil


Its been quite a while since I messed with a Z80.

You might try your question here:comp.arch.hobbyist

Regards,

Tom
 
R

Roger Johansson

Jan 1, 1970
0
Let's take a Z80 for example - when a board with a Z80 (and relevant
RAM, ROM and support chips) is powered on, what is the sequence of
events that takes place?

It starts running, reading the first RAM memory address.
Does the CPU, for example, first expect an interrupt from some other
part of the circuit?
No

Does it immediately try and access RAM or ROM via
the address lines? Etc.
Yes

Or is there a web site somewhere with this info?

Probably
 
P

phil

Jan 1, 1970
0
Its been quite a while since I messed with a Z80.

You might try your question here:comp.arch.hobbyist

Cheers, will do. All advice welcome. :)
 
A

Active8

Jan 1, 1970
0
It starts running,

reset sequences/modes vary from proc to proc and family 2 family,
clearing and setting initial register values and perhaps leaving
others alone or undefined.
reading the first RAM memory address.

IIRC, some of 'em had the reset vector high, no?

processors don't "expect" ints per se, but you can enable and
disable some/most, sometimes all ints by writing a control register.

Let's not forget those data/io lines.

Those spec sheet thingies? My best suggestion is for the OP to start
reading those. They're priceless and free.
 
R

Roger Johansson

Jan 1, 1970
0
Active8 said:
Those spec sheet thingies? My best suggestion is for the OP to start
reading those. They're priceless and free.

The Z80 reference manual:

http://www.zilog.com/docs/z80/um0080.pdf

Inside that pdf file, look at page 28, a minimum system.

See the reset circuit connected to the -reset pin, it is only a resistor from plus 5 Volt and a capacitor to ground.
When the power supply starts the capacitor is charged, and Z80 starts.
It then starts executing the first RAM memory address.
 
J

John Larkin

Jan 1, 1970
0
It starts running, reading the first RAM memory address.

But there's nothing in RAM yet. That would be insta-crash.

Most CPUs fetch a vector (start pointer) from a fixed location in ROM,
which then starts executing BIOS code in ROM, which will eventually
copy the OS from a disk file into RAM and jump into that.

John
 
Following a reset, the Z80 will go to address 0000 and begin to execute that
code. If its RAM, its a problem :) The EPROM will be mapped to that address.
In the early days of 8 and 16 bit CPUs, the restart address was often 0000,
but some, like Motorola start at the highest memory address. Where that
address is on the newest generation, I don't know for sure, but I would
venture a guess that the Intel family goes to 0000 and Motorola goes to the
highest address. Its hard to teach old dogs new tricks. :)

John
 
P

Peter Bennett

Jan 1, 1970
0
I'm curious, please indulge me - what is the normal 'boot sequence'
for your average old CPU?

Let's take a Z80 for example - when a board with a Z80 (and relevant
RAM, ROM and support chips) is powered on, what is the sequence of
events that takes place?

The processor fetches and instruction from a specific location in
memory (location 0 for the 8080/Z80, may be elsewhere for other
processors). What happens after that depends on the instruction it
finds, and on the rest of the program.
Does the CPU, for example, first expect an interrupt from some other
part of the circuit?
No,

Does it immediately try and access RAM or ROM via
the address lines? Etc.
Yes


Or is there a web site somewhere with this info?

Consult the databook for the processor you are interested in.
 
R

Roger Johansson

Jan 1, 1970
0
But there's nothing in RAM yet. That would be insta-crash.


I have used static RAM as ROM myself, that is why I said RAM.
Most people would maybe call a programmed memory a PROM, even if it
actually is a battery-backed static RAM, which is a lot easier to handle
for experimental work, because there is no need for a special programmer
or eraser.

And it doesn't crash, if the first address is empty or not connected it
will just try the next address.

If I recall correctly a memory content of nothing, zero, makes the cpu
execute a NOP, a no operation operation, and it goes on to the next
address.

Even if you have no memory connected you can see the addresslines count
up, trying to find some content other than zero.

Maybe I should add that my knowledge in this field is 20 years old, and
maybe not correct in all details. It was in 1984 I was playing with a
Z80 and static RAM. And I am too lazy to check it up now. :)
 
J

Jonathan Kirwan

Jan 1, 1970
0
I'm curious, please indulge me - what is the normal 'boot sequence'
for your average old CPU?

Let's take a Z80 for example - when a board with a Z80 (and relevant
RAM, ROM and support chips) is powered on, what is the sequence of
events that takes place?

Does the CPU, for example, first expect an interrupt from some other
part of the circuit? Does it immediately try and access RAM or ROM via
the address lines? Etc.

Or is there a web site somewhere with this info?

I'd really like to know this as it will help my understanding
considerably.

Basically, just think of the CPU as having some internal registers and control
bits that are initialized to specific values as the CPU comes "out of reset."
(Most processors have a carefully designed reset state, preceding the moment
when they actually start to 'run'.)

Some CPUs will set their instruction pointer to 0, some to a 'large number', but
all of them set it to a predictable value before they start executing.
Sometimes, this points to some memory inside the CPU. Sometimes, to external
memory (suggesting the CPU actually supports an external memory bus.) Either
way, this memory hopefully will be non-volatile memory of some kind. It's up to
the system designer or the programmer to make sure that some useful code is
there.

What happens after that will depend on the code.

In your IBM PC, it's the BIOS flash or ROM that sits at this point and helps to
start up your PC. In many embedded systems, using small microcontrollers, it's
entirely code you write for your application, forced to be placed at the right
location by a locating linker.

Jon
 
G

Glenn Gundlach

Jan 1, 1970
0
Roger Johansson said:
The Z80 reference manual:

http://www.zilog.com/docs/z80/um0080.pdf

Inside that pdf file, look at page 28, a minimum system.

See the reset circuit connected to the -reset pin, it is only a resistor from plus 5 Volt and a capacitor to ground.
When the power supply starts the capacitor is charged, and Z80 starts.
It then starts executing the first RAM memory address.

That simply cannot be. The 'first' RAM address contains garbage data
since it was just powered up. I suspect the reset vector points to a
ROM address and execution procedes from that instruction. I'm not
familiar with the Z-80, only MCS-51 and 6805/08 bugs but those two are
essentially the same. The Moto bugs get the reset vector programmed
in. The MSC-51 bugs have fixed vectors but you must execute program
from a known value i.e. EPROM/PROM/flash/non volatile, etc.
GG
 
R

Roger Johansson

Jan 1, 1970
0
That simply cannot be. The 'first' RAM address contains garbage data
since it was just powered up.

Not if it is a programmed static RAM, which then works just like a
ROM/PROM.
I suspect the reset vector points to a
ROM address and execution procedes from that instruction.

After reset it starts from memory location zero, and executes the
instruction it finds there. What kind of memory, in a technical sense,
you are using doesn't matter, static RAM, ROM, PROM, EPROM, hardware
switches, diode matrix, or whatever.

(You probably associated to dynamic RAM when I said RAM, but there are
other kinds of RAM memory, which can have a predictable (programmed)
content.)
 
R

Rich Grise

Jan 1, 1970
0
....
What happens after that will depend on the code.

In your IBM PC, it's the BIOS flash or ROM that sits at this point and
helps to start up your PC. In many embedded systems, using small
microcontrollers, it's entirely code you write for your application,
forced to be placed at the right location by a locating linker.

A Locating Linker? Sheesh! I just wrote my code right at its target
address. My assembler would generally put out a .hex file, which I'd
send to the programmer or emulator.

Cheers!
Rich
 
R

Rich Grise

Jan 1, 1970
0
I have used static RAM as ROM myself, that is why I said RAM. Most people
would maybe call a programmed memory a PROM, even if it actually is a
battery-backed static RAM, which is a lot easier to handle for
experimental work, because there is no need for a special programmer or
eraser.

And it doesn't crash, if the first address is empty or not connected it
will just try the next address.

As long as what it's getting is a NOP.
If I recall correctly a memory content of nothing, zero, makes the cpu
execute a NOP, a no operation operation, and it goes on to the next
address.

In 8086, 00H is MOV AX,WORD PTR{BX}. NOP is 90H. :)

Cheers!
Rich
 
J

Jamie

Jan 1, 1970
0
John said:
But there's nothing in RAM yet. That would be insta-crash.

Most CPUs fetch a vector (start pointer) from a fixed location in ROM,
which then starts executing BIOS code in ROM, which will eventually
copy the OS from a disk file into RAM and jump into that.

John
if memory serves, the 0700:0000 rings a bell.
or something like that as to where the
boot loader gets it code loaded into form the
boot sector.
 
J

Jonathan Kirwan

Jan 1, 1970
0
A Locating Linker? Sheesh! I just wrote my code right at its target
address. My assembler would generally put out a .hex file, which I'd
send to the programmer or emulator.

Some assemblers do that. Particularly, if they are used in cases where they do
NOT support multiple source code files per project. Most systems that support
multiple source code files and separate compilation/assembly use a locating
linker, even if you don't see it operating (which you often don't, unless you
know what to look for.)

Jon
 
G

Glenn Gundlach

Jan 1, 1970
0
Roger Johansson said:
Not if it is a programmed static RAM, which then works just like a
ROM/PROM.


After reset it starts from memory location zero, and executes the
instruction it finds there. What kind of memory, in a technical sense,
you are using doesn't matter, static RAM, ROM, PROM, EPROM, hardware
switches, diode matrix, or whatever.

(You probably associated to dynamic RAM when I said RAM, but there are
other kinds of RAM memory, which can have a predictable (programmed)
content.)

Have you actually done this or is this an assumption? You might note
that I DID mention several varieties of memory that would be usable
for boot code. You say that 'static RAM' would be OK and that is just
not the case. Static RAM is only static as long as the power is on.
Obviously a battery backed static RAM (non volatile RAM) could work.
From a powered off condition, the RAM contents is random garbage and
is useless as code.

The start address is device dependant and may or may not be '0'. For
example, the 68HC908 reset vector is $FFFE. The value stored there is
the address to begin execution. For that bug it is most certainly not
0.

The 8031 does start at 0 but since the other vectors are in the low
addresses, you need to jump to the start of the code.

gg
 
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