# normally-on jfet

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#### sachin

Jan 1, 1970
0
I am sachin.I am doing my research on jfets.

I would like to know how to avoid the start up problems of an normally
on jfet and the applications of jfets.

sachin.

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#### Robert Baer

Jan 1, 1970
0
sachin said:
I am sachin.I am doing my research on jfets.

I would like to know how to avoid the start up problems of an normally
on jfet and the applications of jfets.

sachin.

What do you mean "start-up problem"?
What circuit(s) are you having a problem with (describe)?

S

#### sachin

Jan 1, 1970
0

start-up problem in my sense is the large transient current flowing
through the jfet as it is connected to a voltage source..

so i need a solution to avoid this large current in short how to avoid
this short circuit behaviour of jfet.

byee

R

#### Robert Baer

Jan 1, 1970
0
sachin said:

start-up problem in my sense is the large transient current flowing
through the jfet as it is connected to a voltage source..

so i need a solution to avoid this large current in short how to avoid
this short circuit behaviour of jfet.

byee

Jfets, per se, do *not* act that way, unless you are looking at
transients in the sub-nanosecond region, where capacitance is dominate.
A jfet, with a reasonable Vgs bias (even zero bias) will "pinch off"
above a certain drain to source voltage, making it act like an
adjustable current source (or sink, depending on P or N channel jfet).
A jfet with gate tied to source acts like a linear resistor without
regard to polarity, over a fairly reasonable voltage range.
Changing the Vgs will change that resistivity over orders of magnitude
(down to leakage levels).
Applying a positive bias to the gate will not only decrease that
resistivity, but also may cause significant gate current.
*That* is why i asked about the circuit(s), and i wish to repeat that
question.