W
Winfield Hill
- Jan 1, 1970
- 0
continued OT from the thread, Looking for pulse-rated zener.
colin wrote...
Hmm, oscillation for a high-voltage string of MOSFETS in series,
due to the series connection, you think? As opposed to just the
bottom MOSFET by itself? How high was the FET operating current
when you observed oscillation?
Let's evaluate the scene.
For a series-connected MOSFET the current gain is unity from DC
to a frequency f_T = g_m / 2pi Ciss, where the gate capacitance
robs the ac signal current away from the FET's source path. For
a BJT, the transconductance gm = Ic/Vt = 40 Ic. It's lower for
power MOSFETs, g_m = Id/nVt in the subthreshold region, where
n = 3 to 5, according to my measurements. So here a MOSFET has
3 to 5x lower g_m than a BJT at the same current. Above the
FET's threshold gate voltage, where the currents are from 5 to
100% of the FET's maximum operating current, g_m still rises
with current, but at a much slower rate.
I would think the bottom line is, you need to work within say
20% or higher of the FET's maximum current to get its g_m, and
thus f_T, high enough to take part in serious RF oscillation.
While operation at such a high voltage and current is practical
for a few milliseconds, I imagine it'd create too much power
dissipation to do continuously.
This means most continuous linear use of power MOSFETs occurs
in the subthreshold region, where the g_m/Id ratio is higher,
but where the transistor's f_T remains low, say under 20MHz.
For example, I'm using fqd2n100 surface-mount 2A 1kV FETs in
a series-connected amplifier. At the maximum current of 4mA
with 400V across the FET, it dissipates about 1.6W, pushing the
junction temperature up by about 90C, which is as high as I'm
comfortable to go. This FET has Ciss = 400pF. At 4mA it has
g_m = 32mS, which means its f_T = 13MHz. Oops! that's getting
into a dangerous region. If I was using a similar MOSFET, with
heatsinks, at currents higher than 4mA, there could be trouble.
colin wrote...
Winfield Hill wrote ...
Yes thanks thats what i was asking, as both cases have the vds>20v
at high curent. Trying to think of a way of avoiding it yet still
using a more deterministic way of setting the peak voltage.
Actually i was wondering if a cascode mosfet arangement would behave
any better, again it might make it less noticable as the bottom device
would stay more in control of the current, although i would be worried
about this as long ago I had some nasty oscilations when i was trying
to make a high voltage power supply with several series mosfets (600v
mosfets were very limited at the time), but unfortunatly i never had
the time (or the experience back then) to get to the bottom of all
the diferent modes of oscilations.
Hmm, oscillation for a high-voltage string of MOSFETS in series,
due to the series connection, you think? As opposed to just the
bottom MOSFET by itself? How high was the FET operating current
when you observed oscillation?
Let's evaluate the scene.
For a series-connected MOSFET the current gain is unity from DC
to a frequency f_T = g_m / 2pi Ciss, where the gate capacitance
robs the ac signal current away from the FET's source path. For
a BJT, the transconductance gm = Ic/Vt = 40 Ic. It's lower for
power MOSFETs, g_m = Id/nVt in the subthreshold region, where
n = 3 to 5, according to my measurements. So here a MOSFET has
3 to 5x lower g_m than a BJT at the same current. Above the
FET's threshold gate voltage, where the currents are from 5 to
100% of the FET's maximum operating current, g_m still rises
with current, but at a much slower rate.
I would think the bottom line is, you need to work within say
20% or higher of the FET's maximum current to get its g_m, and
thus f_T, high enough to take part in serious RF oscillation.
While operation at such a high voltage and current is practical
for a few milliseconds, I imagine it'd create too much power
dissipation to do continuously.
This means most continuous linear use of power MOSFETs occurs
in the subthreshold region, where the g_m/Id ratio is higher,
but where the transistor's f_T remains low, say under 20MHz.
For example, I'm using fqd2n100 surface-mount 2A 1kV FETs in
a series-connected amplifier. At the maximum current of 4mA
with 400V across the FET, it dissipates about 1.6W, pushing the
junction temperature up by about 90C, which is as high as I'm
comfortable to go. This FET has Ciss = 400pF. At 4mA it has
g_m = 32mS, which means its f_T = 13MHz. Oops! that's getting
into a dangerous region. If I was using a similar MOSFET, with
heatsinks, at currents higher than 4mA, there could be trouble.