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Oscillator buffer

O

o pere o

Jan 1, 1970
0
The thread related to large signal PSpice models and an emitter follower
comes from the following problem:

I have an oscillator that should drive a digital part of the system.
In short, what is the best way to achieve this?

My first attempt has been a common base Colpitts oscillator that gives a
signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate
biased to the point that gives square output signals.

This works more ore less ok, but: the startup transient, which is
important here, is different depending if the oscillator amplitude is
sufficient to toggle the gate. This translates into an envelope that
raises more ore less smoothly until the gate begins toggling, where the
envelope raises more abruptly -and I guess that the instantaneous
frequency changes.

I have thought of two causes for this. The first one is feedback via the
DC supply: the spikes generated by the gate switching get coupled back
to the oscillator. The second one could be the change in input impedance
seen by the oscillator -does this make sense? The cure for #1 could be
better supply bypassing. The cure for #2 a buffer stage.

So, what could be a good way to generate a digital signal from an
oscillator without loading it? Ideally I would like to preserve the
instantaneous frequency of the unloaded startup transient. And: power
consumption should be low, say preferably (much) less than 1 mA.
Operating frequency should be initially 27 MHz, but ideally scalable up
to ~1 GHz.

Pere
 
P

petrus bitbyter

Jan 1, 1970
0
o pere o said:
The thread related to large signal PSpice models and an emitter follower
comes from the following problem:

I have an oscillator that should drive a digital part of the system.
In short, what is the best way to achieve this?

My first attempt has been a common base Colpitts oscillator that gives a
signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate
biased to the point that gives square output signals.

This works more ore less ok, but: the startup transient, which is
important here, is different depending if the oscillator amplitude is
sufficient to toggle the gate. This translates into an envelope that
raises more ore less smoothly until the gate begins toggling, where the
envelope raises more abruptly -and I guess that the instantaneous
frequency changes.

I have thought of two causes for this. The first one is feedback via the
DC supply: the spikes generated by the gate switching get coupled back to
the oscillator. The second one could be the change in input impedance seen
by the oscillator -does this make sense? The cure for #1 could be better
supply bypassing. The cure for #2 a buffer stage.

So, what could be a good way to generate a digital signal from an
oscillator without loading it? Ideally I would like to preserve the
instantaneous frequency of the unloaded startup transient. And: power
consumption should be low, say preferably (much) less than 1 mA. Operating
frequency should be initially 27 MHz, but ideally scalable up to ~1 GHz.

Pere

Why can't you use a power on reset circuit that keeps the clock signal low
until the oscillator has stabilized?

petrus bitbyter
 
O

o pere o

Jan 1, 1970
0
Study a 4046 PLL chip for how to efficiently AC-couple to a CMOS
inverter.

...Jim Thompson

Thanks for the suggestion for improving the coupling. I will have a look
at it. However, in the 4046 the VCO is giving a stable amplitude, so the
effect of the load is constant. Without having looked at it, I am afraid
that in the gradual transition from small signal to large signal, the
input impedance of the inverter will change significantly...

Pere
 
O

o pere o

Jan 1, 1970
0
Do you want an LC oscillator that starts instantly and coherently,
with a digital clock output? We do that, with LCs at low frequencies,
and coaxial ceramic resonators at 500 MHz or so. 1 GHz shouldn't be
horribly difficult, except for the milliwatt constraint. It's just a
matter of getting the initial conditions right.

https://dl.dropbox.com/u/53724080/Circuits/Burst_Osc.jpg

Are you building some kind of synchronous oscillator? In our application
an external signal influences the startup transient (think superreg.
principle) and the information contained therein should be more or less
preserved.

Pere
 
O

o pere o

Jan 1, 1970
0
Why can't you use a power on reset circuit that keeps the clock signal low
until the oscillator has stabilized?

petrus bitbyter

Unfortunately not in this application. The startup transient is the
relevant fact here.

Pere
 
O

o pere o

Jan 1, 1970
0
In general you're going to have a hard time getting the oscillator
frequency to stay constant as it starts: the oscillator's characteristics
must change as it settles into steady-state, because by definition the
loop gain goes from more than unity to exactly unity (on average) at that
point.

The response from an unloaded oscillator is already ok, even taking
these facts into account. Loading it more or less directly with a CMOS
gate is not ok.
Making the oscillator so that the active device loads the resonator as
little as possible will go a long way to achieving this, but won't get
you all the way.

You may need to just do some breadboarding: if you add supply bypassing
to the oscillator and the jump goes away, then the problem was supply
coupling. If you figure out how to shove a buffer amp in there and the
jump goes away, then it was input impedance on the 74xxx.

Yes, I have to investigate both ways. In the meantime I wanted to hear
if there were other facts that I had overlooked.

Pere
 
O

o pere o

Jan 1, 1970
0
We use gated oscillators in our digital delay generators. When we gat
a rrigger, we start a clock oscillator, and count ticks to get coarse
delay. An analog ramp thing gives fine delay to interpolate down to
picoseconds. Sometimes just the LC is good enough, for short delays.
The coaxial resonator things are great for medium accuracy and delay.
he best is to use a gated LC for the clock, but phase-lock it to a
crystal oscillator to get longterm precision.

I have used ceramic coaxial resonators to build oscillators at ~433 MHz,
and they are quite stable.
I have also seen that you make stuff on FPGAs. IIRC there are
interesting techniques to achieve high timing precision making use only
of digital resources (keywords: time to digital FPGA)...
In our application

OK, that's different. It's an externally quenched superregen, I guess.

Why not use a grounded LC and a non-inverting gain element? Or you
could use a tiny toroidal transformer, with a secondary winding for
the base of a PNP transistor, to provide the gain.

I have used several oscillator topologies. At 800 MHz the tapped-C // L
resonator plus emitter follower works ok, i.e. it is a non-inverting
topology. But the problem is more or less the same: how to tap the
signal out.
One oscillator that I really like is an LVDS-CMOS converter chip that
is both the feedback gain and the comparator, with the LC grounded.
But that wouldn't work for your application, if I understand it.

You mean something like the DS90C032? You mean sensing with the LVDS
side and feeding back from the CMOS side to provide the gain? I guess
that this would not work, as I need a wide linear part where the
oscillator grows up more or less slowly...

Thanks for your inputs.

Pere
 
G

Gerhard Hoffmann

Jan 1, 1970
0
Am 15.11.2012 09:25, schrieb o pere o:
Unfortunately not in this application. The startup transient is the
relevant fact here.

Download the operating & service manual for the HP 5370 A/B time
interval counter. It has startable oscillators that really work.
Circuits included.

regards, Gerhard
 
G

George Herold

Jan 1, 1970
0
OK, rising to this here challenge here, I open my trusty copy of Radio
Engineering (Frederick Terman, 3rd edition, 1947, p 410.) He shows the
three classic oscillators as "Hartley", "Colpitts", and "Tickler
Feedback", the latter being transformer coupled. But he does show the
resonating cap in the grid winding, not the plate.

--

John Larkin         Highland Technology, Inc

jlarkin at highlandtechnology dot comhttp://www.highlandtechnology.com

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom laser drivers and controllers
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro   acquisition and simulation- Hide quoted text -

- Show quoted text -

Nice thread, (wiki calls the tickler the Armstrong.)
The only RF oscillator I know is used to drive a Rb discharge lamp.
It's a Hartly basically copied from an efratom lamp circuit.

To Opere, I don't quite get your problem.
To sense the circuit you're going to have to take a bit of energy
out.
This must change the Q and (thus) the resonant frequency.
If it's a changing Q when you switch in your circuit.. (?)
then you have to balance it out.

George H.
 
I have thought of two causes for this. The first one is feedback via the

DC supply: the spikes generated by the gate switching get coupled back

to the oscillator. The second one could be the change in input impedance

seen by the oscillator -does this make sense?

Reason # 3 : Logic gate input is clamping the signal to one or more rails.
 
O

o pere o

Jan 1, 1970
0
[snip]
You mean something like the DS90C032? You mean sensing with the LVDS
side and feeding back from the CMOS side to provide the gain? I guess
that this would not work, as I need a wide linear part where the
oscillator grows up more or less slowly...

Thanks for your inputs.

Pere

Does your buffer need to replicate the oscillator amplitude ramp-up,
or can the buffer simply square it up?

...Jim Thompson
The end effect has to be just driving a digital input when the amplitude
is sufficiently high. It does not need to replicate the transient. If it
does, I guess that it will be better behaved in terms of constant
loading, but it is not necessary.

Pere
 
O

o pere o

Jan 1, 1970
0
On 11/16/2012 01:25 AM, George Herold wrote:

Nice thread, (wiki calls the tickler the Armstrong.)
The only RF oscillator I know is used to drive a Rb discharge lamp.
It's a Hartly basically copied from an efratom lamp circuit.

To Opere, I don't quite get your problem.
To sense the circuit you're going to have to take a bit of energy
out.
This must change the Q and (thus) the resonant frequency.
If it's a changing Q when you switch in your circuit.. (?)
then you have to balance it out.

George H.


Current oscillator version is

Vcc Vcc Vcc
| | |
C L R1
| | |
| C-*--*-----C---*----Dig. Gate
*-B C1 |
| E-*-* R2
R | | |
| Re C2 gnd
ctrl | |
gnd

If the Gate impedance were constant for small and large signal, this
would be ok (controlled loading). What I am seeing is that when the Gate
sees enough signal to begin toggling the transient changes. Hope this
sketch helps explaining:

envelope: *************
*
*
*****
***** |
0****** | --------------------------0
<smooth rising> | <saturated>
|
start toggling-> (very) fast rising

As mentioned in my original post, I see 2 possible causes for this: 1.
Coupling through the Vcc rail (although more ore less well bypassed)
and 2. Different behavior of the gate for small and large signal.

The cure for 2 is what I am looking for. Cure for 1 would be better
bypassing.

The other configuration I have used (at ~900MHz) is

Ctrl-
Rb C---Vcc
--C-*---B
| | E
L C1 |
| | |
| *----*
| C2 Re
| | |
gnd gnd gnd

And a similar one, with a transmission line instead of L has been used
at 2.4 GHz.

A minicircuits gain block with a hairpin resonator has also worked ok at
2.4 GHz, although this was not low-power (tens of mA):

·---Amp---·
| |
·-· ·---· <-Phasing lines
|| ||
|| || <--Resonator
|| ||
·-·

(Maximum simplicity)
 
B

Bill Sloman

Jan 1, 1970
0
The thread related to large signal PSpice models and an emitter follower
comes from the following problem:

I have an oscillator that should drive a digital part of the system.
In short, what is the best way to achieve this?

My first attempt has been a common base Colpitts oscillator that gives a
signal riding on the +Vcc rail. This has been AC coupled to a 74AC gate
biased to the point that gives square output signals.

This works more ore less ok, but: the startup transient, which is
important here, is different depending if the oscillator amplitude is
sufficient to toggle the gate. This translates into an envelope that
raises more ore less smoothly until the gate begins toggling, where the
envelope raises more abruptly -and I guess that the instantaneous
frequency changes.

I have thought of two causes for this. The first one is feedback via the
DC supply: the spikes generated by the gate switching get coupled back
to the oscillator. The second one could be the change in input impedance
seen by the oscillator -does this make sense? The cure for #1 could be
better supply bypassing. The cure for #2 a buffer stage.

So, what could be a good way to generate a digital signal from an
oscillator without loading it? Ideally I would like to preserve the
instantaneous frequency of the unloaded startup transient. And: power
consumption should be low, say preferably (much) less than 1 mA.
Operating frequency should  be initially 27 MHz, but ideally scalable up
to ~1 GHz.

One weird and expensive approach would be to use something like an
AD834 as your gain stage; set it up with enough initial gain to get
the oscillator to start up respectably fast, then drop the gain back
to a level that sustains the oscillation when the digital logic
detects an edge. If you can live with a little bit of clipping, the
"sustain" gain wouldn't have to be too well defined.

http://www.analog.com/static/imported-files/data_sheets/AD834.pdf

The power consumption is rather higher than you want.

Multipliers are designed to have the same gain over a respectable
range of input amplitudes, so the start-up ought to be well-defined.
 
O

o pere o

Jan 1, 1970
0
Reason # 3 : Logic gate input is clamping the signal to one or more rails.


Well, that could be the reason if the oscillator amplitude became large
enough. However, in practice -though not in theory- the oscillator
amplitude however tends to saturate at levels that, even riding on 0.5
Vcc should not reach the rails (iirc less than 1 Vpp). But I will have
to check that to be sure...

Pere
 
O

o pere o

Jan 1, 1970
0
One weird and expensive approach would be to use something like an
AD834 as your gain stage; set it up with enough initial gain to get
the oscillator to start up respectably fast, then drop the gain back
to a level that sustains the oscillation when the digital logic
detects an edge. If you can live with a little bit of clipping, the
"sustain" gain wouldn't have to be too well defined.

http://www.analog.com/static/imported-files/data_sheets/AD834.pdf

The power consumption is rather higher than you want.

Multipliers are designed to have the same gain over a respectable
range of input amplitudes, so the start-up ought to be well-defined.

A multiplier would offer a better control of gain, which could translate
into a bigger linear range of operation. Of course, at the price of cost
and power consumption but it could serve as an idealized prototype.
However, when I played with analog multipliers in the past (at
frequencies much much lower than the 500MHz of your suggestion), they
did not perform as well as announced in the datasheets -it could have
been my fault...

Pere
 
F

Fred Bartoli

Jan 1, 1970
0
John Larkin a écrit :
Here's the LLarkin oscillator, which uses a MMIC and a couple of
inductors in the gain path.

Oh, I thought LO stood for Local Oscillator...
 
B

Bill Sloman

Jan 1, 1970
0
A multiplier would offer a better control of gain, which could translate
into a bigger linear range of operation. Of course, at the price of cost
and power consumption but it could serve as an idealized prototype.
However, when I played with analog multipliers in the past (at
frequencies much much lower than the 500MHz of your suggestion), they
did not perform as well as announced in the datasheets -it could have
been my fault...

The Analog Devices multipliers all have added extra Barry Gilbert. He
invented the concept and has run with it for a long time now. There
are a variety of copies available, all much cheaper, but not as good.
 
O

o pere o

Jan 1, 1970
0
Maybe buy the MC12148 equivalent of my mid-60's design...

http://www.analog-innovations.com/SED/MC1648-DataSheet.pdf

Which has a buffered PECL output, which can be easily
capacitor-coupled to CMOS.

...Jim Thompson

I had used the 1648 in the past! A simple and nice VCO indeed. Now it
seems the only successor is the MC100EL1648 from OnSemi, but I may have
overlooked something.

I remember having tried to use that chip to make a quenchable oscillator
but with modest success. Perhaps you could suggest a clever way to tweak
the gain to allow for this? Power consumption would still not be within
the desired range, but I might learn something from it.

Pere
 
O

o pere o

Jan 1, 1970
0
Here's the LLarkin oscillator, which uses a MMIC and a couple of
inductors in the gain path. This works well with coaxial resonators.
Too much power for your app, unfortunately.
<snipped circuit>
Why don't you use small C's instead of L2 and L3? That should give
similar impedance transformation at less expense...

For mmic and coaxial resonator I have used a tapped C at the input and
output:

--C--*----*-----C--*----
| | |
C res C
| | |
-----*----*--------*-----

Pere
 
O

o pere o

Jan 1, 1970
0
Do you need to quench the oscillator itself, or just the buffered
output? The output is simple PECL.

...Jim Thompson

It is the oscillator that has to be quenched. I recall fiddling around
with ramping up the Vcc of the oscillator part (with the last original
1648's that I had left) and perhaps I even tried something else -it is
quite a long time ago. Do you see a possibility via the AGC pin, for
instance?

Pere
 
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