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PIC Interrupts - C18 compatibility mode

S

Steve

Jan 1, 1970
0
I'd appreciate some advice on PIC interrupts under M'chip C18. Just
working on converting some PIC 18F252 C code for use with Microchip
C18, which is new to me, C18 is a good deal more complex than the C
compiler I've used to date, which hid the detailed vectoring -
interrupt setup is a bit trickier... I want to leave the device in
basic 16X compatibility mode as used before, don't need priorities,
only one ISR involved. I understand that I have to get the priority
right as far as the compiler is concerned so that either hardware or
s/w stacks are used for the context save. I'm not sure I've got this
right for compatibility mode as in this case the vector for all
interrupts is 0x08, the high priority vector in 18F priority mode.

I *think* that the only way the compiler decides how to context save
during the ISR is the line #pragma interruptlow (or interrupt) just
before the ISR function itself, hope this is correct?

Anyway, can someone kindly advise if the code below will work to set
up one ISR with C18.

Steve

Code:

/* Interrupt vector setup */

#pragma code low_vector=0x08 //All interrupts at this address

void interrupt_low(void)
{
_asm
goto Interrupt_main
_endasm
}
#pragma code //Returns to previous code section


//and later.....


#pragma interruptlow Interrupt_main
void Interrupt_main(void)
{
if (PIR1 & 0x01) /* Timer 1 interrupt */
 
F

Fritz Schlunder

Jan 1, 1970
0
Steve said:
I'd appreciate some advice on PIC interrupts under M'chip C18. Just
working on converting some PIC 18F252 C code for use with Microchip
C18, which is new to me, C18 is a good deal more complex than the C
compiler I've used to date, which hid the detailed vectoring -
interrupt setup is a bit trickier... I want to leave the device in
basic 16X compatibility mode as used before, don't need priorities,
only one ISR involved. I understand that I have to get the priority
right as far as the compiler is concerned so that either hardware or
s/w stacks are used for the context save. I'm not sure I've got this
right for compatibility mode as in this case the vector for all
interrupts is 0x08, the high priority vector in 18F priority mode.

I *think* that the only way the compiler decides how to context save
during the ISR is the line #pragma interruptlow (or interrupt) just
before the ISR function itself, hope this is correct?

Anyway, can someone kindly advise if the code below will work to set
up one ISR with C18.

Steve

Code:

/* Interrupt vector setup */

#pragma code low_vector=0x08 //All interrupts at this address

void interrupt_low(void)
{
_asm
goto Interrupt_main
_endasm
}
#pragma code //Returns to previous code section


//and later.....


#pragma interruptlow Interrupt_main
void Interrupt_main(void)
{
if (PIR1 & 0x01) /* Timer 1 interrupt */
.
.
}


I'm not the world's foremost expert in C18, but I believe your understanding
appears correct and your code is valid and should work fine so long as you
never set the RCON <IPEN> bit (which at power on defaults to clear).
Although 0x08 happens to be the high priority interrupt vector address, when
interrupt priorities are not enabled (RCON <IPEN> = 0) all interrupts should
go to 0x08.
 
S

Steve

Jan 1, 1970
0
I'm not the world's foremost expert in C18, but I believe your understanding
appears correct and your code is valid and should work fine so long as you
never set the RCON <IPEN> bit (which at power on defaults to clear).
Although 0x08 happens to be the high priority interrupt vector address, when
interrupt priorities are not enabled (RCON <IPEN> = 0) all interrupts should
go to 0x08.

Thanks I'll give that approach a try out then!

Steve
 
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