J
John Barrett
- Jan 1, 1970
- 0
I know nothing about doing that, I would like to learn to use CPLDs or
FPGAs whichever is the best thing right now, seems like it might be CPLDs.
I've taken a couple of shots at it using some of the vendor provided
development tools -- schematic capture + simulation + compiling
It always came down to "too complicated for gate level logic -- use VHDL"
and I've never had the time or motivation to learn VHDL, so I ended up using
PICs and AVRs instead.. throwing lotsa little chips at the problem instead
of one big integrated chip
The other problem I have with CPLDs and FPGAs is the newer devices are too
much for in-house programming -- you have to send off your design to the
vendor and they send you back loaded chips to test with -- usually they are
pretty good about doing that free the 1st few times if they think you are
going to market -- but after that -- you pay per chip at a steep markup
because its a one-off job for them.. not a production run
The ones that you can program in-house are relatively limited -- I dont
think any of them are up to doing serious SOC work -- not enough gates
(unless something has changed in the year or so since I last messed around
with using CPLD for a project)