"precision" current measurement project design review/ check

super7800

Jan 2, 2019
6
hello!

I was wondering if anyone could take a look at my circuit for my second version of my "precision" current sensor, specifically the analog section. (TL/DR Last Paragraph). my first version, discussed Here, was a overall failure, although I did learn quite Abit from that so it wasn't a total loss, and my professor seemed to agree since I did end up getting an good grade on it.

I have obviously not given up, and have since designed a second version. It is for my final project for an advanced digital systems class, so features more of a digital system than my previous attempt. it is not part of the assignment to design my own board or circuit, but where's the fun in that : )

the "goal" of the project is accurate measurement of currents ranging from 1uA to 1A, with a burden of 10uV/mA and 10uV/uA, using a 10R and a 0.01R shunt. the "application" is to measure sleep currents of microcontrollers, but obviously this can be accomplished more simply, I would want my device to offer features for other "precision" current measurements. (the theoretical value for 10uV/mA is likely to have a slightly higher burden, maybe 15uV/mA)

it works by using two shunts, which are amplified by a differential op amp, and then again by a PGA, and then fed into a dual channel (multiplexed) 24 bit ADC. both shunts can be measured (almost) at the same time, as each has their own amplification path, and the 10R can be shorted with a relay. No I don't expect to get 24 bits of usable data on this prototype, but the more usable bits the better.

analog side is isolated from digital using a pair of dc/dc isolation modules and an spi isolator. analog side is controlled by an ICE-40 fpga, and digital from a ATSAM arm mcu. the fpga does all the signal processing tasks, the mcu handles the 240x320 color tft lcd, pc communication, and other tasks. the device is battery powered from 1s lipo, although it is not designed for maximum battery life, as its intended to be plugged into USB for most applications. also of note the pictured 10R shunt is likely to change to a lower wattage rated one.

that's the brief summary, If anyone wants more information I would be more than happy to elaborate. pictured below (wouldn't let me attach) are images of the case, analog amplification, analog power supplies, and PCB layout. also attached is a full pdf schematic. PCB layout has inner power/GND layers hidden. I don't expect anyone to fully or even partially review my design, but if anyone has any input on my analog section/ layout, my full design, or has a suggestion for an entirely new way to approach the shunt measurement problem, I would appreciate it, as I'd like this ~300$prototype to at least somewhat work (lol), as I probably couldn't do a new version for awhile if this one fails catastrophically . Thanks. Attachments • Schematic_3.1 low burden current sensor_2021-03-12_01-16-56.pdf 664.6 KB · Views: 2 Bluejets Oct 5, 2014 5,995 with a burden of 10uV/mA and 10uV/uA, using a 10R and a 0.01R shunt As far as I can see , the whole arrangement is dependant on the accuracy of the resistance. super7800 Jan 2, 2019 6 thanks for your reply, but what do you mean? the x10 amplification uses a quad resistor package, the lt5400, which matches 0.01% with a 7.5% tolerance on values. The shunt 0.01R is 0.1%, and the 10R is about 1%. the shunt tolerance shouldn't be an issue, taken care of by software calibration, but perhaps the 10k, 100k pairs in the lt5400 at 7.5% tolerance might be an issue, even though they very closely match. i'll have to calculate out though if the 7.5% can be software calibrated out or not. is that what you where referring to? thanks. super7800 Jan 2, 2019 6 I've changed my design slightly, specifically on the x10 amplification stage. pictured below is my new circuit, but it does have its downfalls, mainly requiring 2x 8$ resistor packages each (total of 4). Cost is not the issue, I just feel that I might be overlooking a simpler solution, and I ask whether or not my design is a good implementation, any improvements to my design, or if anyone has a solution requiring less matched precision resistor packages (but similar performance). I might add a potentiometer to adjust the CMRR, but I'm hoping the resistors match closely enough.

Pictured is a "clear" picture of what I'm considering using (NOT the one used). the one actually used has two packages of 4x 5K and 4x 1K resistors, as the 4 values need to match closely, but the ratio is software calibrated (i.e. gain). VREF = 2.5v. it is fully differential. differential in, differential out.

attached are the new design for the analog frontend (picture = full), and the PCB layout (not pictured are inner layers 1&2, which are GND and power + GND) (Picture = layout, render 2, and render 4).

Attachments

• full.png
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• render 2.PNG
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• render 4.PNG
202.7 KB · Views: 1
• layout.PNG
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super7800

Jan 2, 2019
6
I believe that I have now reached my final design, with likely very little left to change (I might replace the x10 stage with something else). I have added two more fairly low cost ADC's (16 bit), that I'm using just for their high sample rate, and (almost) couldn't care less about their actual accuracy as long as their values can show a trend. I'm using them in the FPGA to help implement some data algorithms, and outputting a "compressed" sample rate to the ARM micro for graphing, analysis, and storage. The ltc2442 is still the main ADC.

I'm curious on anyone's opinion on reference filtering, do you think that I should do any filtering on the voltage reference, perhaps similar to this Design Note? thanks.

also as before if anyone has input on my analog section it would be appreciated, thanks. specifically on the x10 stage.

The only other change is to the analog power section, where I'm using adjustable regulators now, and a power sequencer. I have also added a second reference for the Vcm. I may also add some form of filtering to the reference aforementioned.

I do not expect to reach the goals of my project on this revision, and would expect to have to design at least one more version before I reach my goal. I will likely not fully populate this prototype's analog section, probably removing the 10R shunt and its accompanying components from the digikey order, but if the prototype exceeds expectations I would order the additional analog parts. I will likely order the PCB's and parts for this prototype sometime this week, perhaps on 3/25/21. any input on my design is appreciated, thanks.

attached are new design files. the pcb has the two inner layers hidden, GND and power + GND.

Attachments

• pcb analog render.PNG
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• pcb analog.PNG
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• Analog Power.png
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• Analog System.png
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• Schematic_3.2 low burden current sensor.pdf
745.7 KB · Views: 1

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