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Programmable negative constant current source

Rajinder

Jan 30, 2016
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Hi Steve,
I apologise for the questions. You helped me with the negative programmable current source. Would you be able to answer a few questions please.
1. My thoughts were to use a n channel device with drain to 0V and source provide the negative voltage. As the drain is more positive than the source the fet should work. Provided Vgs is greater than Vth of the FEt. Is this correct? In the schematic that you helped me with would vgs also be negative with respect to vth?
2. Please could you let me know how you derived the equations to work out the current? I am a little confused.
3. My understanding of the circuit is that, the voltage developed across the sense resistor is fed back and compared to the voltage from the DAC. The opamp fights to keep the voltages the same at both inputs, due to virtual earth concept. If that is correct, how can the opamp drive the FET, or will there be a slight difference of a few mV, which is enough to drive the FET?
4. In this configuration, is the FET in the linear or saturation region? I thought it was the saturation, because drain current is flat irrespective of Vds. Is this assumption correct?
I would appreciate your help. I have to do a presentation and want to know everything about this circuit operation.
Best regards,
Rajinder
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
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0. Damn, I didn't realize I was doing your homework.

1. Your thoughts were good. Congrats for doing that analysis and not following my error blindly.

2. Pretty trivially from memory. I'd need to go back and review what I wrote.

3. Consider what that voltage is and the effect of any voltage dividers

4. The region the mosfet is operating in depends on the load. However in general the mosfet is likely to be in the saturation region rather than the triode region.
 

(*steve*)

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Basically speaking the positive input voltage must be balanced by a negative voltage across the sense resistor so that the voltage on the non-inverting input remains at ground potential. The voltage divider determines that ratio.

the circuit is a simple inverting amplifier with the output the voltage developed across the sense resistor. The mosfet is inside the feedback loop.

The simple equation is a combination of the equation for an inverting amplifier modified slightly (using ohms law) to restate the output as the current through the sense resistor rather than the voltage across it.

the more complex equation also takes into account the current through the voltage divider which is an error term that is usually not significant.
 

Rajinder

Jan 30, 2016
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Basically speaking the positive input voltage must be balanced by a negative voltage across the sense resistor so that the voltage on the non-inverting input remains at ground potential. The voltage divider determines that ratio.

the circuit is a simple inverting amplifier with the output the voltage developed across the sense resistor. The mosfet is inside the feedback loop.

The simple equation is a combination of the equation for an inverting amplifier modified slightly (using ohms law) to restate the output as the current through the sense resistor rather than the voltage across it.

the more complex equation also takes into account the current through the voltage divider which is an error term that is usually not significant.
Thanks Steve
No it wasn't homework. I needed to connect the circuit to another circuit but have a common ground. That's where your advice and suggestions helped.
Best regards,
Rajinder
 

(*steve*)

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OK, I hope my explanation helped.

If you need more detail let me know.
 

Rajinder

Jan 30, 2016
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Hi Steve,
I tried to follow the equations but do not understand them. I get the inverting amplifier but nothing else. Sorry but could you explain it? I don't understand the current calculation, or if you could give me a hint.
Best regards,
Rajinder
 

(*steve*)

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the normal calculations yield an output voltage. Using the relationship V = IR, where I is the output current and R is the sense resistor value, substitute this for the output voltage, then solve for I
 

Rajinder

Jan 30, 2016
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Hi Steve,
Thanks for your help. My understanding is as below:
The inverting amplifier is there to give me a negative output from the input with a gain of -1. So 1V I/p will give me 1V o/p. The feedback sense resistor will feed a voltage back to the opamp input. Because of the virtual earth of the opamp, this fights to keep the inputs the same. For example if the input is -1V on the inverting stage then the non inverting stage will also be -1V. this is then across my sense resistor, so say -1V / 1M (sense resistor) will produce 1uA of current.

I am not sure of the FET in the loop, but here goes:
VD>VS since VD =0, VS = negative value. The gate of the FET is kept above Vthreshold VGS>Vth. Since the FET is in saturation mode as long as VD>VS the current is constant flat.
Please could you expand on the FET in the loop analysis for me.
I would appreciate any help.

Best regards,
Rajinder
 

(*steve*)

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Firstly, the gain is not -1, but that required to give the appropriate voltage across the sense resistor at the nominated input voltage.

for example, if an input voltage of 10V must correspond with a current of 1A, and the sense resistor is 0.1 ohm, then the voltage across it (which is the output voltage) is -0.1 volts.

thus the gain is -0.1/10 = -1/100. This will change depending on your required input voltage range, output current range, and sense resistor value.

Don't worry about what the FET is doing. The opamp's output is doing what is required to keep the inputs equal. It is simply turned on sufficiently to maintain the required voltage across the sense resistor.
 
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