Question about D Flip Flop

[dbeauch]

I have a question about a D flip-flop with with asynchronous clear and present (see attached image). Why does clear-bar have to go through the NAND gate with the data, D? Wouldn't it work without that?

 

[Harald Kapp]

This is a master-slave flip-flop. If clear (or preset) were not connected to the slave (right 2 gates), you could reset (or set) the master, but the state of the slave would not change.

 

[dbeauch]

This is a master-slave flip-flop. If clear (or preset) were not connected to the slave (right 2 gates), you could reset (or set) the master, but the state of the slave would not change.

I understand that, but I'm specifically asking about the clear-bar signal being sent through the NAND gate with the 'D' input. Why is that necessary? The preset-bar goes through only 2 NAND gates, but clear-bar goes through 3! Something seems strange about that.