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Question about op amp dual supply circuit...

Explorer

Mar 28, 2014
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Hi, being the amateur/newbie that I still am, I have not wanted to take a second look at any op amp circuits that require a dual supply. But, then I found the circuit below in an old schematics encyclopedia and it looked simple enough to build. So, I did. (This was before I found out about the nifty little LT1054 IC.) I added a switch to the circuit and made some changes that are indicated on the schematic. I'm wondering if any of them are bad ideas or unnecessary. Especially the trim pot, via which I'm able to get the 2 outputs nearly spot-on to each other. (But, I've been reading things that make me think that op amps are supposed to have slightly different outputs. Yes? No???)

Anyway, the circuit works, but there is a voltage spike when it is first turned on—for just a few seconds—before the 2 outputs settle down to a little bit below half of the input voltage.

Is there any easy way to prevent that voltage spike and keep the circuit able to handle any input voltage in the specified range?

Op Amp Supply.jpg
 

kellys_eye

Jun 25, 2010
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What, precisely, are you using for the power supply? Does it ramp up the +ve and -ve rails at the same rate/instant?
 

Explorer

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What, precisely, are you using for the power supply? Does it ramp up the +ve and -ve rails at the same rate/instant?
I’ve tried a couple of wall wart-type power supplies. Re: second question: I don’t know. I’ve usually had my meter on one side at a time, watching it spike and then settle back down. When I switch the positive meter lead over to the negative voltage side, that is then sitting at the same value that the positive voltage settled down to.
 

crutschow

May 7, 2021
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Is there any easy way to prevent that voltage spike and keep the circuit able to handle any input voltage in the specified range?
That can be difficult to prevent.
One way is to use an analog switch to not connect the output to the load, until the circuit has settled to it's quiescent condition.
 

danadak

Feb 19, 2021
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I am thinking that circuit has some major problems :

1) Inputs are violating CMR for that particular OpAmp over significant ramp up[ of input power.

2) Output 22 uF sure to put it into oscillation depending on what other load is present.
ua741 not known for driving any significant C load.

3) On power up when power is < V+ - V- operatimng of OpAmp no telling what circuit
will do.

4) Large cap hung off Vni input can damage OpAmp depending on how system gets shut down.

5) No effective short circuit protection for high output loads.


Regards, Dana.
 

Explorer

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That can be difficult to prevent.
One way is to use an analog switch to not connect the output to the load, until the circuit has settled to it's quiescent condition.
I was thinking that time might be the simplest solution.
 

Explorer

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@danadak, what’s CMR? I don’t have the knowledge to analyze the circuit or understand most of your post above. I got the circuit from a big, thick encyclopedia of schematics compiled by John Markus. I’ve got some LT1054 ICs on order, as a simpler way to do it. (BTW, I find the language of electronics to be utterly incomprehensible, as though it was all invented to prevent any understanding whatsoever. Most of it is like trying to read German, to me.)
 

danadak

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CMR (and CMRR) is Common Mode Rejection and Common Mode Rejection Ratio :


Item 3, Post #6 (stability) :




Language barrier : There is, like most professions, a wall to climb, and the only solution I know
is effective is read constantly. Thru out most of my career everyday I would read something,
sometimes as short as a paragraph, more often an application note. Its an exponential thing,
comprehension and language, once you get thru initial period stuff starts falling into place.

Read read read......and play, use protoboard and try out various simple circuits, use scope,
DMM, its all very effective growing your understanding.


Regards, Dana.
 
Last edited:

bertus

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Nov 8, 2019
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Hello,

The little books of Mims will have several simple circuits with some explanations:
https://archive.org/details/folkscanomy_electronics?tab=collection&query=mims&sort=-publicdate
Also this book might interest you:
Also this book might come in handy:

Bertus
 

Explorer

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Thanks, Bertus! I have so many electronics books, it’s not funny. It’s still mostly Greek to me.
 

bertus

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Hello,

Perhaps it is an idea to start reading the books of the All About Circuits site for the electronics basics:

I already downloaded them and attached them to this post.

Bertus
 

Attachments

  • Volume I direct-current.pdf
    4.3 MB · Views: 3
  • Volume II alternating-current.pdf
    4.4 MB · Views: 1
  • Volume III semiconductors.pdf
    3.9 MB · Views: 1
  • Volume IV digital.pdf
    3.5 MB · Views: 1
  • Volume V reference.pdf
    840.8 KB · Views: 1
  • Volume VI experiments.pdf
    3.8 MB · Views: 1

danadak

Feb 19, 2021
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“CMR” was in your reply. Did you perhaps mean “CMRR”?!
CMRR=20log10CMR

Either will suffice for the discussion.

Actually CM as a problem is point of discussion, the above of course
actual measurements.
 

Explorer

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Thanks again, Bertus! I was however looking for answers to my questions about the circuit above and my modifications to it. Danadak went WAY over my head. I can’t even begin to “discuss” any of that. And only one answer touched on part of what I asked.
 

bertus

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Hello,

The 22 uF capacitor at the potmeter will slow down the setting of the output voltage.
I have seen simelar circuits where only 0.1 uF is used on the potmeter (as noise reduction from the powersupply).

Bertus
 

danadak

Feb 19, 2021
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Thanks again, Bertus! I was however looking for answers to my questions about the circuit above and my modifications to it. Danadak went WAY over my head. I can’t even begin to “discuss” any of that. And only one answer touched on part of what I asked.

1) Inputs are violating CMR for that particular OpAmp over significant ramp up of input power.

2) Output 22 uF sure to put it into oscillation depending on what other load is present.
ua741 not known for driving any significant C load.

3) On power up when power is < V+ - V- operatimng of OpAmp no telling what circuit
will do.

4) Large cap hung off Vni input can damage OpAmp depending on how system gets shut down.

5) No effective short circuit protection for high output loads.

These are all cautions concerning your design choice. Not answers to your
questions as I felt other posters had already taken care of that. Think a yield
sign at a busy intersection, you can ignore it and hopefully make it thru, or
you can remove the uncertainty and reliably keep on moving forward.

Regards, Dana.
 

Explorer

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Hello,

The 22 uF capacitor at the potmeter will slow down the setting of the output voltage.
I have seen simelar circuits where only 0.1 uF is used on the potmeter (as noise reduction from the powersupply).

Bertus
Well, that’s a more helpful reply to my original questions. Thanks! If I reduce the size of the cap there (I’m assuming you mean at the trimpot, and ooops! I added that trimpot to the schematic above poorly!—without rerunning that cap connection around it) would I need to add it back somewhere else, like in this circuit—which is highly symmetrical? And Danadak, do you like this circuit better?:

A8F2071C-276E-4AED-AD7F-33F4DA34CC3A.jpeg

Only thing is, I’m not sure if I have any power transistors on hand.
 
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