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SMPS's with cascoded opto feedback

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
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Unless he agrees with us, in which case we'll accept his opinion as absolute, conclusive proof, right? :)

I agree. He would need to provide evidence, or an explanation which can be tested, or which explains any differences in a way which leads logically from what we all accept and understand.

Whether or not it is peer reviewed is not a real issue (although, if it was, it would lend possibly enough weight that one might not need to experimentally verify it).
 

Arouse1973

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Steve
Re-done the tests for the rise/fall timings and after running them from a battery they are now pretty much the same. So looks like it was the PSU capacitance misleading me. So yes you were right LOL. But on another note, if the circuitry is ever powered from a PSU and say your measuring the pulse width in CC or CE configuration, wouldn't the processor see what I was seeing on the scope in the first test? This would mean for real life circuits CC is better. Just a thought.
Adam
 

(*steve*)

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But on another note, if the circuitry is ever powered from a PSU and say your measuring the pulse width in CC or CE configuration, wouldn't the processor see what I was seeing on the scope in the first test?

In this case, that extra capacitance was added in one configuration to the output and not the other. In real life, the capacitance will be from the load that the optocoupler is switching.

One would take pains to ensure that such capacitance is eliminated as far as possible.

Also of note is the fact that the additional load capacitance was present when the ground lead of the scope was placed at other than a low impedance point in the circuit. Normally this would be attached to the ground rail of the device under test.

Id does highlight the perils of making floating measurements with a scope though (where the scope ground is connected to other than a supply rail).

This would mean for real life circuits CC is better. Just a thought.

No, the problem exists when the ground lead is connected to the junction between the transistor and the resistor. You can get an identical, but opposite, behaviour by trying to measure any of the voltages in either configuration with the ground probe connected inappropriately.

The problem is the additional capacitance between the output and either supply rail.

You may recall that I was quite particular (well, I tried to be) in saying that the load had to be identical when comparing the configurations. This is one of several aspects of the load which can affect switching speed.
 

Arouse1973

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I think I have been a donkey. It has just dawned on me after going through this an electron and hole at a time I have missed one big boo boo which I know and should twigged on.

We all know that in a dc configured transistor switch (NPN) circuit that the emitter current is the total of base and collector current i.e. base current lost out of base never combines with the collector current and is lost but this still entered the emitter.

What I have been over looking quite stupidly is that yes photons from an IR led will create a base current but they have no where to go because the base is open.
So they must be swept across into the collector because holes still have to be available for the next lot of electrons from the emitter.

Then just to prove I was right I thought well if this is the case then if I put a capacitor onto the base of the transistor and drive it with a sine wave with no pull up or pull down on the base then because the simulated components are ideal the transistor should stop working once all the charge is depleted from one side of the capacitor because in blocks dc and cant get electrons from anywhere to replace the charge removed.

Guess what, it did. So then I thought I need a charge injection from somewhere so I put a pull up on the base and it started working again.

I knew all this really I did I just got side tracked and missed the biggest fundamental of charge flow with no parallel path.

Well they thought Einstein was retarded at school, so there is hope for me yet. LOL

Sorry guys you were right all along, I shouldn't of doubted you.

Cheers
Adam
 

eem2am

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Well, to recap, this thread proved that connection of optocouplers in SMPS feedback circuits is not affected by whether the opto is connected in either "common collector" or "common emitter" configuration. Neither connection offers a higher feedback loop bandwidth than the other.

However, linear.com , on page 17 of their LT4430 datasheet, do say that the common collector configuration offers higher feedback loop bandwidth.
http://cds.linear.com/docs/en/datasheet/4430fc.pdf

....I put the arguments of this thread to linear.com and they have come back with this answer...stating that they support what they say in their datasheet...


QUOTE
Hi:

I am not an expert in OPTO couplers but I think that the difference is coming from applied collector-emitter voltage.

The Vce affects base-collector capacitance. If OPTO is biased with higher voltage the base-collector capacitance will be lower and result in higher bandwidth.

When OPTO is used in common emitter configuration it is usually operating with low Vce from 0.5V to 2V and collector-emitter capacitance is relatively high.

From my own experience, the common collector with 5V-10V of bias voltage yields the highest bandwidth (and lowest phase shift).

I hope that this helps.

BR,

UNQUOTE
 

KrisBlueNZ

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I think that the difference is coming from applied collector-emitter voltage.
The Vce affects base-collector capacitance. If OPTO is biased with higher voltage the base-collector capacitance will be lower and result in higher bandwidth.
When OPTO is used in common emitter configuration it is usually operating with low Vce from 0.5V to 2V and collector-emitter capacitance is relatively high.
Sounds fair enough.
 

eem2am

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Yes but the datasheet does not refer to that, and that datasheet has being saying what it says for the last 10 years....and in any case, the "common collector" with the higher vce voltage is surely not going to make "that" much of a difference to bandwidth, compared to the "common emitter" with lower vce?
 

KrisBlueNZ

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Yes but the datasheet does not refer to that, and that datasheet has being saying what it says for the last 10 years...
I strongly suspect that whoever wrote the data sheet had simply not realised that it was meaningless to describe a two-terminal optocoupler transistor as operating in common emitter or emitter follower topology, and that the usual differences between those topologies do not apply.

Whether they got the idea that the emitter output connection gives better bandwidth from a simple assumption, based on their misunderstanding, or whether they actually found that the bandwidth of the emitter output configuration is better by testing it, and the difference is due to the lower collector-emitter capacitance because of the higher Vce, I couldn't say.

I suspect your Linear Technology contact is looking for an excuse to justify what was said in the data sheet. He said he's not an expert on optocouplers; I suggest he should have referred the issue to someone who could provide a more definite answer. That said, though, of course he could be right.
and in any case, the "common collector" with the higher vce voltage is surely not going to make "that" much of a difference to bandwidth, compared to the "common emitter" with lower vce?
I don't know how much the collector-base capacitance varies with Vce. I do know that the collector-base junction of the transistor in an optocoupler is deliberately made quite large, because it is the photosensitive area and they want to maximise the CTR. That will increase the collector-base capacitance.

A web search turned up an interesting document at http://web.mit.edu/klund/www/Dphysics.pdf. At the end of section 1.4 there's a formula for the collector-base capacitance, but there are two variables that greatly affect the dependence on Vce (Vcb actually) whose values, for an optocoupler transistor, are not given, so I can't estimate how much effect Vce (or Vcb) will have on Ccb.
 

(*steve*)

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Yes but the datasheet does not refer to that, and that datasheet has being saying what it says for the last 10 years....and in any case, the "common collector" with the higher vce voltage is surely not going to make "that" much of a difference to bandwidth, compared to the "common emitter" with lower vce?

Look at the document I pointed you at. It covers this.

And again... it is one of the reasons I was very careful to say "all other things being equal" (or words to that effect).

The voltage across the device, the current it's switching, and various other factors can make a difference. But where the load is placed is not one of them.
 
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