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Speed up nuclear electronics system

kenbui.nuclear.physics

Mar 8, 2012
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Mar 8, 2012
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Hello everyone,
First time I join this forum. Nice to meet all of you and hope we would have wonderful time to discuss interesting projects.
By the way, I have something that some people here may be very interested in.
I'm a senior in the university of science, Vietnam. I'm working on a nuclear electronics system (NES). NES has a FPGA chip, this chip is programmed by Quartus II 9.0, in VHDL code. And we present the result (histogram, data, ....) by LabVIEW 8.5 software. FPGA is sticked on a board, a XILINX board, and be connected to computer by a rs232-to-usb cable
My job now is to speed the NES up. does anyone enjoy? would you help me with some advice?
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(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Jan 21, 2010
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Welcome kenbui.

I can't help you but maybe one of our other members can.

Welcome to Electronics Point.
 

GreenGiant

Feb 9, 2012
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My first thought would be to check the time delays in the Labview programming, and reduce those.

After that try to get a faster FPGA in the system, or use a faster XILINX board

Lastly try cleaning up the programming, I am not familiar with VHDL but I have experience with AHDL and I know that it can get slowed down a lot with small programming loops that you accidentally put in there, or if you are doing too much at once
 

kenbui.nuclear.physics

Mar 8, 2012
5
Joined
Mar 8, 2012
Messages
5
My first thought would be to check the time delays in the Labview programming, and reduce those.

After that try to get a faster FPGA in the system, or use a faster XILINX board

Lastly try cleaning up the programming, I am not familiar with VHDL but I have experience with AHDL and I know that it can get slowed down a lot with small programming loops that you accidentally put in there, or if you are doing too much at once

in VHDL, loops also make the system gets slowed down. maybe, I will try to tell you a little bit more clearly. in the university's system, we want to build up a histogram with vertical component is COUNTS, and horizontal component is Channel, Channel means Energy. This histogram is built up in LabVIEW. RS232-to-USB cable is used to connect FPGA chip and LabVIEW software. Because of the slow speed of this cable (as I know is 115,200), we lost a lot of data. So I have a solution: save data in a memory, then send it through rs232 cable with the speed is 100,000 (nearly equal the speed of rs232). how do you think about my solution?
 

Joshie75

Feb 16, 2012
18
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Feb 16, 2012
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18
I have a small hardware suggestion;

Do you have USB 3.0 installed into your PC? or even USB 2.0?
USB 3.0 Can handle speeds of up to 5GB per second; which is quite fast.
USB 2.0 Can handle speeds of up to 480MB per second; which is fast, but in reality when running heavy data through the USB, 480MB per second is actually that fast. I would look into USB 3.0 and see if it is available for installation.
 

kenbui.nuclear.physics

Mar 8, 2012
5
Joined
Mar 8, 2012
Messages
5
I have a small hardware suggestion;

Do you have USB 3.0 installed into your PC? or even USB 2.0?
USB 3.0 Can handle speeds of up to 5GB per second; which is quite fast.
USB 2.0 Can handle speeds of up to 480MB per second; which is fast, but in reality when running heavy data through the USB, 480MB per second is actually that fast. I would look into USB 3.0 and see if it is available for installation.

thanx for your advice. but my thesis is try to speed up by changing the code in VHDL and LabVIEW. :D I apologize for making you misunderstanding
 

Joshie75

Feb 16, 2012
18
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Feb 16, 2012
Messages
18
Oh alright. I've only worked with FPGA boards a little bit, so I can't help on that end. Best of luck with your project and I hope the more senior members are able to help!
 
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