Maker Pro
Maker Pro

Synchronous Counter Circuit with "mystery output."

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
Need help with an issue please.

This circuit is suppose to spell out "CLUE" and repeat. I can get it to work great on multisim. But when I physically build the circuit. It doesn't work.

It spits out a seemingly random "CLCECULECLECU" Those letters are in no particular order everytime. It's something different everytime other than "CLUECLUE..."

I checked my wiring ALOT, over and over....then checked it over and over again.

I swapped both 74LS76 IC's, samething. Swapped them again with another pair, samething.
I swapped the 7 Seg display, samething.

I moved the circuit to a different part of the breadboard, and alas, same thing again.

I know the diagram is correct, and it works 100% on Multisim.

Any ideas?
 

Attachments

  • mystery output.JPG
    mystery output.JPG
    31.1 KB · Views: 1,542

donkey

Feb 26, 2011
1,301
Joined
Feb 26, 2011
Messages
1,301
just to help us out could you also send us pictures of your built project. someone might be able to notice something in there
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
just to help us out could you also send us pictures of your built project. someone might be able to notice something in there

That can take a while, lol.

Plus, I'm no rookie at this. I work electronicsfor a long time in the navy. Now i'm going to school for the "degree" in it.

Not trying to sound arrogant. But, I already scrutinized it, again, and again.

It can be the stupid breadboard itself. I know the quality is "outstanding"

I might just buy a new one.
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
12,613
Joined
Nov 17, 2011
Messages
12,613
Maybe it is due to a random initial state after reset? This might be due to the flipflops reacting differently to a bouncing reset signal. you can try:

1) reduce the Pull-up ressitor on the reset line from 1k to 330 Ohm

2) add a small ceramic capacitor (1 nF - 10 nF) from RESET to GND
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
Maybe it is due to a random initial state after reset? This might be due to the flipflops reacting differently to a bouncing reset signal. you can try:

1) reduce the Pull-up ressitor on the reset line from 1k to 330 Ohm

2) add a small ceramic capacitor (1 nF - 10 nF) from RESET to GND

I'll give that a shot and see what happens.

thanks
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
This circuit is supposed to spell out "CLUE" on the 7 seg display.
It is hitting letters at random. like "CLCLELCULECUEL..." in no particular order.

My wiring is correct. I have checked over and over.....then checked it over and over again. Then I had two others scrutinize the wiring. Every point has continuity where it is supposed to. I swapped out both 74LS76 ICs, twice. Changed the display. Used a different function generator.

The only problem I can find is when I set the generator for 5V square wave, it has a -5V peak as well.
So I changed it the best I can to 2.5V and offset by 2.5 volts, so it will be a +5V square wave. But, the offset won't go that far, so I still have some negative voltage flowing.

Will that make the circuit act weird?

Any other ideas?

This is on a bread board too. I'm not sure how much the stray capacitance with impact the circuit.

And this works 100% on multisim, too. So I know the circuit is good.
 

Attachments

  • mystery output.JPG
    mystery output.JPG
    31.1 KB · Views: 261
Last edited:

Harald Kapp

Moderator
Moderator
Nov 17, 2011
12,613
Joined
Nov 17, 2011
Messages
12,613
You already have a thread on this topic here: https://www.electronicspoint.com/need-help-issue-please-t250931.html I know, because I've tried to help you there.

Why do you bother us by repeating the same question in a new thread?

Having said that: yes, a negative voltage on the clock may lead to unpredictable behaviour. Add a series resistor (e.g. 1kOhm) between function generator and clock input of your circuit. Also: since you use 74LS, you do not have to go to +5V for HIGH. +4V should be sufficient. Can you set up the function generator for +2V offset and +-2V amplitude? This would eliminate the negative pulses.
 
Last edited:

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
You already have a thread on this topic here: https://www.electronicspoint.com/need-help-issue-please-t250931.html I know, because I've tried to help you there.

Why do you bother us by repeating the same question in a new thread?

Having said that: yes, a negative voltage on the clock may lead to unpredictable behaviour. Add a series resistor (e.g. 1kOhm) between function generator and clock input of your circuit. Also: since you use 74LS, you do not have to go to +5V for HIGH. +4V should be sufficient. Can you set up the function generator for +2V offset and +-2V amplitude? This would eliminate the negative pulses.

The function generator responded the same way. the only way it will not have a negative pulse, it if it's set really low. As soon as I increase the amplitude, the negative peak dips below the negative threshold.

I'm sorry if it's such a bother, I forgot that is really to simply ignore.
I also am new to forums, I tried to "search" for it, but I couldn't find it.

If you don't want to help, just say so, or just ignore it. Or I can make it easy and just find a forum that actually wants to help instead of jumping on a high horse.
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
12,613
Joined
Nov 17, 2011
Messages
12,613
Maybe you misunderstod my post: I'm not complaining about you asking for help. I try to help.
What I'm complaining about is you opening a new thread. You should have used the first thread so others (not only me) can get an idea what your problem is about and what has been said and done in the past. This can reduce double effort.

Having said that:
Make a circuit like this:
attachment.php

The diode will block negative pulses, the resistor will ensure LOW potential during that time.
 

Attachments

  • clock_input.gif
    clock_input.gif
    1.4 KB · Views: 584

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
Maybe you misunderstod my post: I'm not complaining about you asking for help. I try to help.
What I'm complaining about is you opening a new thread. You should have used the first thread so others (not only me) can get an idea what your problem is about and what has been said and done in the past. This can reduce double effort.

Having said that:
Make a circuit like this:
attachment.php

The diode will block negative pulses, the resistor will ensure LOW potential during that time.

Thanks, I also asked about a diode if I'm not mistaken, but I may be.

Also, I guess you didn't see the part as to why I re-posted.

Thanks for your help though.
 

donkey

Feb 26, 2011
1,301
Joined
Feb 26, 2011
Messages
1,301
if you need to find old posts goto "user CP" at the top of the page. then on the left side look for "subscribed threads" 2 lines under that is "view all". you should be able to find your old posts in there
 

gorgon

Jun 6, 2011
603
Joined
Jun 6, 2011
Messages
603
Why don't you use the last half 74ls76 to clean your clock. I suspect that the 3 clocks does not act equal to the circuit, or the clock input itself is glitching, making more than one puls each time. If you collect all clocks through the last jk-flipflop, it should be better. Decoupling and a capacitor on the 5V should also help.

TOK ;)
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
if you need to find old posts goto "user CP" at the top of the page. then on the left side look for "subscribed threads" 2 lines under that is "view all". you should be able to find your old posts in there

Thanks, I feel dumb now. :p
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
Why don't you use the last half 74ls76 to clean your clock. I suspect that the 3 clocks does not act equal to the circuit, or the clock input itself is glitching, making more than one puls each time. If you collect all clocks through the last jk-flipflop, it should be better. Decoupling and a capacitor on the 5V should also help.

TOK ;)

I used Multisim to take some measurements, and I noticed the circuit acts on the trailing of the clock pulse. I attached what I found. Maybe you will have a more clear picture.

What really tripped me out is my instructor said a student in the past got this circuit to work as is. So, either my wiring is still bad (after just checking it again), or all of those ICs I used were bad, or the input was bad.

I also tried to make a 555 timer to use as a clock. No joy.
 

Attachments

  • Clue outputs.jpg
    Clue outputs.jpg
    71.1 KB · Views: 602

Harald Kapp

Moderator
Moderator
Nov 17, 2011
12,613
Joined
Nov 17, 2011
Messages
12,613
I used Multisim to take some measurements, and I noticed the circuit acts on the trailing of the clock pulse
You don't need Multisim for that. Notice the circle at the clock input of the 74LS76A? This circle means the inout is inverting. It is the same symbol as used on the output of a gate. By convention a CLK would act on the rising edge, thus by negating the clk it acts on the falling edge.

This, however, should have nothing to do with your problem of the circuit not showing the correct sequence.

To analyse more detailed what's going on I suggest you start by not using a clock generator at all. Use a manual clock so you can clock the circuit step-by-step through the sequence and you have lots of time between clock pulses to analyze the state of the circuit. Use a debouncing circuit liek e.g. this to generate a clear clock pulse from a pushbutton. (You could, by the way, use the same circuit to debounce your reset signal.)
Reset the circuit, the LED should show an "L". Do also look at the Q-outputs of the flipflops, just to ensure the states are all correct. No give a first clock pulse using the pushbutton. Does the circuit act as excpected? Compare the Q-states of the flipflops with your multisim simulation.

Does the state sequence correspond to the simulation? If nit, where is the diffenrece? Try to find out why.
If the sequence is the same as in multisim, we're back to the clock as the source of the problem.
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
You don't need Multisim for that. Notice the circle at the clock input of the 74LS76A? This circle means the inout is inverting. It is the same symbol as used on the output of a gate. By convention a CLK would act on the rising edge, thus by negating the clk it acts on the falling edge.

This, however, should have nothing to do with your problem of the circuit not showing the correct sequence.

To analyse more detailed what's going on I suggest you start by not using a clock generator at all. Use a manual clock so you can clock the circuit step-by-step through the sequence and you have lots of time between clock pulses to analyze the state of the circuit. Use a debouncing circuit liek e.g. this to generate a clear clock pulse from a pushbutton. (You could, by the way, use the same circuit to debounce your reset signal.)
Reset the circuit, the LED should show an "L". Do also look at the Q-outputs of the flipflops, just to ensure the states are all correct. No give a first clock pulse using the pushbutton. Does the circuit act as excpected? Compare the Q-states of the flipflops with your multisim simulation.

Does the state sequence correspond to the simulation? If nit, where is the diffenrece? Try to find out why.
If the sequence is the same as in multisim, we're back to the clock as the source of the problem.

That was awesome, I'm going to construct it and test it out. The simulation was great.
Hopefully it works. Thanks a bunch. I actually have faith in it this time.
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
You don't need Multisim for that. Notice the circle at the clock input of the 74LS76A? This circle means the inout is inverting. It is the same symbol as used on the output of a gate. By convention a CLK would act on the rising edge, thus by negating the clk it acts on the falling edge.

This, however, should have nothing to do with your problem of the circuit not showing the correct sequence.

To analyse more detailed what's going on I suggest you start by not using a clock generator at all. Use a manual clock so you can clock the circuit step-by-step through the sequence and you have lots of time between clock pulses to analyze the state of the circuit. Use a debouncing circuit liek e.g. this to generate a clear clock pulse from a pushbutton. (You could, by the way, use the same circuit to debounce your reset signal.)
Reset the circuit, the LED should show an "L". Do also look at the Q-outputs of the flipflops, just to ensure the states are all correct. No give a first clock pulse using the pushbutton. Does the circuit act as excpected? Compare the Q-states of the flipflops with your multisim simulation.

Does the state sequence correspond to the simulation? If nit, where is the diffenrece? Try to find out why.
If the sequence is the same as in multisim, we're back to the clock as the source of the problem.

That work almost 100%. Every once in a while it thru in a random "U" or "L". Other than that, it works pretty good. I blame the rest on old equipment, and the bread board. Thanks man.
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
12,613
Joined
Nov 17, 2011
Messages
12,613
A random character means that at least one or more of the flipflops see an additional clock pulse. Maybe some additional decoupling capacitors (100nF) as near as possible to each IC can help?
 

jdouglasusn

May 29, 2012
29
Joined
May 29, 2012
Messages
29
A random character means that at least one or more of the flipflops see an additional clock pulse. Maybe some additional decoupling capacitors (100nF) as near as possible to each IC can help?

and I would put a cap where each flip-flop connect to each other?
 
Top