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Toggle power with menbrane switch

J

Joseph

Jan 1, 1970
0
Will this work to toggle power using a membrane switch?
http://www.flickr.com/photos/[email protected]/441030617/

To power up: The PWR button brings the SHDN button high, turning everything
on. The processor keeps the SHDN pin high after after it boots up.
To power down: Monitor the PWR button, set the SHDN pin low when it is
pressed. Question. I need the diode to separate the "keep on" voltage from
the PWR button signal. I'm not sure I have this correct.
 
J

John Fields

Jan 1, 1970
0
Will this work to toggle power using a membrane switch?
http://www.flickr.com/photos/[email protected]/441030617/

To power up: The PWR button brings the SHDN button high, turning everything
on. The processor keeps the SHDN pin high after after it boots up.
To power down: Monitor the PWR button, set the SHDN pin low when it is
pressed. Question. I need the diode to separate the "keep on" voltage from
the PWR button signal. I'm not sure I have this correct.

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Too much of a PITA for me... Why not post your binary to
alt.binaries.schematics.electronic ?
 
E

ehsjr

Jan 1, 1970
0
Joseph said:
Will this work to toggle power using a membrane switch?
http://www.flickr.com/photos/[email protected]/441030617/

To power up: The PWR button brings the SHDN button high, turning everything
on. The processor keeps the SHDN pin high after after it boots up.
To power down: Monitor the PWR button, set the SHDN pin low when it is
pressed. Question. I need the diode to separate the "keep on" voltage from
the PWR button signal. I'm not sure I have this correct.

I think "The PWR button brings the SHDN button high"
should read "The PWR button brings the SHDN *pin* high"

It won't work as you have drawn it. With everything
off, the out pin will be low. Pressing the pwr
button will connect low to SHDN - the opposite
of what you need. I think you need to do something
like this:

+3 ---[PWR]---[C1]---+----+----mon[CPU]--------+------> 5V
| | | | Out
| [D] [D] | Pin
| | | |
[R] +---[R]---+---SHDN [C2]
| | |
| [R] |
| | |
Gnd -----------------+--------------+----------+

Sequence from off to on:
All off, press power, SHDN goes +, 5V turns on, CPU turns on.
The power on reset condition must put + on SHDN. A power
on reset routine must loop until mon goes -, meaning
the power button has been released. Once mon goes -, the
main program runs.

Sequence from on to off:
Press power, mon goes +, program reads mon and toggles
SHDN low. CPU continues to run briefly via C2 after MAX1675
shuts down, to hold the SHDN pin - long enough for C1 to
be discharged.

Ed
 
J

Joseph

Jan 1, 1970
0
I think "The PWR button brings the SHDN button high"
should read "The PWR button brings the SHDN *pin* high"
correct

It won't work as you have drawn it. With everything
off, the out pin will be low. Pressing the pwr
button will connect low to SHDN - the opposite
of what you need.

The spec sheet says that simply connecting OUT to SHDN will turn the
regulator on.

I think you need to do something like this:
+3 ---[PWR]---[C1]---+----+----mon[CPU]--------+------> 5V
| | | | Out
| [D] [D] | Pin
| | | |
[R] +---[R]---+---SHDN [C2]
| | |
| [R] |
| | |
Gnd -----------------+--------------+----------+

Sequence from off to on:
All off, press power, SHDN goes +, 5V turns on, CPU turns on.
The power on reset condition must put + on SHDN. A power
on reset routine must loop until mon goes -, meaning
the power button has been released. Once mon goes -, the
main program runs.

Sequence from on to off:
Press power, mon goes +, program reads mon and toggles
SHDN low. CPU continues to run briefly via C2 after MAX1675
shuts down, to hold the SHDN pin - long enough for C1 to
be discharged.

Ed

I've posted (I think) my updated schematic to
alt.binaries.schematics.electronic.

Ed,
It looks like you have the 3V going _through_ C1...is that correct?
I think your explaination will work, I just can't figure out the schematic.
j
 
E

ehsjr

Jan 1, 1970
0
Joseph said:
I think "The PWR button brings the SHDN button high"
should read "The PWR button brings the SHDN *pin* high"

correct


It won't work as you have drawn it. With everything
off, the out pin will be low. Pressing the pwr
button will connect low to SHDN - the opposite
of what you need.


The spec sheet says that simply connecting OUT to SHDN will turn the
regulator on.


I think you need to do something like this:
+3 ---[PWR]---[C1]---+----+----mon[CPU]--------+------> 5V
| | | | Out
| [D] [D] | Pin
| | | |
[R] +---[R]---+---SHDN [C2]
| | |
| [R] |
| | |
Gnd -----------------+--------------+----------+

Sequence from off to on:
All off, press power, SHDN goes +, 5V turns on, CPU turns on.
The power on reset condition must put + on SHDN. A power
on reset routine must loop until mon goes -, meaning
the power button has been released. Once mon goes -, the
main program runs.

Sequence from on to off:
Press power, mon goes +, program reads mon and toggles
SHDN low. CPU continues to run briefly via C2 after MAX1675
shuts down, to hold the SHDN pin - long enough for C1 to
be discharged.

Ed


I've posted (I think) my updated schematic to
alt.binaries.schematics.electronic.

Ed,
It looks like you have the 3V going _through_ C1...is that correct?
I think your explaination will work, I just can't figure out the schematic.
j

I suppose it's symantics - the 3V isn't "going _through_ C1"
per se. You get a pulse charging C1, then the 3V is blocked.

The cap is there to give you a + pulse to get things
started and to get things stopped. But I drew it wrong -
no discharge path. Grumble. The cap needs a discharge
path on the right:

+3 ---[PWR]---+---[C1]---+---+----mon[CPU]--------+------> 5V
| | | | | Out
| | [D] [D] | Pin
| | | | |
[R] [R] +---[R]---+---SHDN [C2]
| | | |
| | [R] |
| | | |
Gnd ----------+----------+-------------+----------+

I added a resistor - it allows the cap to discharge
when the button is released.

Ed
 
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