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USB filtering confusion

Rajinder

Jan 30, 2016
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Hi,
I have attached a part of the datasheet for a FTDi device.
The evaluation schematic board has a filter and 10nF connected between VBUS1 and 0V. I can't see the point of the filter as VBUS1 is connected directly to the FTDI chip (pin 12)?

The FTDI hardware recommendations state there is a different filter configuration. This makes more sense as the VBUS is filtered to obtain a clean 5V0 supply that would then power the FTDi chip.

Do I need to include the first schematic (ferrite + 10nF) and then from the ferrite/10nF junction add the second schematic for additional filtering i.e. 10nF + ferrite (BK0) + 100nF + 4.7uF?

Which one do I use or is it a combination of both?

Thanks in advance.


upload_2021-5-12_20-37-3.png


upload_2021-5-12_20-37-21.png
 

Rajinder

Jan 30, 2016
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it provides filtering for EVERYTHING connected to VBUS1
Hi, thanks for your reply. The two filtering configurations are different. My thinking is that you would need to clean the USB supply by filtering before it goes to the FTDI chip. Whereas the top schematic has VBUS1 connected straight to the FTDI chip, surely that means you will have a noisy VBUS1 connected to the FTDI chip? I am still confused.
 

Harald Kapp

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Nov 17, 2011
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@Rajinder : you seem to have a habit of reading datasheets only partially.
The yellow box in the FTDI app note's figure 2.5 is the USB connector. Of course it shows USV_VBUS next to the connector. Then follows a filter made from C1, C2, C3 and a ferrite to produce a clean 5V0. This clean 5V0 is then used to power the FTDI chip.

The top design in your post places VBUS1 on top of the ferrite, equivalent to the right side in the app note's figure 2.5. It follows that VBUS1 is the equivalent of 5V0 in the app note's design. Names can be used arbitrarily, it is the connections that count. And these are identical in both figures.
 

Rajinder

Jan 30, 2016
548
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@Rajinder : you seem to have a habit of reading datasheets only partially.
The yellow box in the FTDI app note's figure 2.5 is the USB connector. Of course it shows USV_VBUS next to the connector. Then follows a filter made from C1, C2, C3 and a ferrite to produce a clean 5V0. This clean 5V0 is then used to power the FTDI chip.

The top design in your post places VBUS1 on top of the ferrite, equivalent to the right side in the app note's figure 2.5. It follows that VBUS1 is the equivalent of 5V0 in the app note's design. Names can be used arbitrarily, it is the connections that count. And these are identical in both figures.
Hi, thanks for your reply. I was looking at it from a layout point, I will re label the VBUS1 from the 100nF/4.7uF/Ferrite junction as 5V. This will make it more clearer. Thanks, I am sorry I will try and read the datasheets a bit more in depth.
 
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