Using FETs in parallel

[Terry Given]

My NMR gradient drivers push the fets to close to their rated power
(as much as 300 watts dissipation per TO247) at, say, 10% duty cycle,
one pulse per second. Pulse fatigue doesn't seem to be a problem with
the parts I've used, in that we're not seeing any indication of a
wearout mechanism.


John

have a look at

http://www.pwrx.com/pwrx/app/dip_gen_3_app_note.pdf

fig. 5.54.

summary:

dTj no. cycles (0.1% failure rate)
30 4E6
40 7E5
50 1.5E5
60 5E4
70 2E4
80 9E3
90 4E3
100 2E3


its pretty clear that if dTj < 30K you can completely ignore the
problem. one simple solution is great heatsinking (some bloke called
Larkin wrote a nice waffly story he kindly posted on the internet, well
worth reading). full-pak packages are thus utter shite in this respect
(cue images of ricardo montalban's midget, pointing to picture of
Arrhenius, shouting "derate, derate")

what they dont show in this graph is that its not so much dTj, its
dTj/dt. if the temp rise is fast wrt die-attach thermal time constant,
thats where the thermal stresses arise which lead to voids in the
die-attach, increasing Rtheta....

another approach is to minimise dTj, leaving Tj_final the same. I have
done this by varying Fswitch as a function of load, so at light load my
devices switch quickly, and stay nice and hot - a constant-loss
algorithm, if you will. as long as the algorithm acts faster than the
relevant thermal time constant, dTj can be reduced to arbitrarily small
values. best not to think about the electricity bill though

I had a quick squiz but couldnt find the TO-247 paper (if you saw my
lab, you would understand . ISTR the graphs looked similar. there have
been many such papers on DCB modules, but this was the first one I have
seen wrt TO-247.


Cheers
Terry

 

[Spehro Pefhany]

Spehro Pefhany wrote...

Running Windows in your machines again? Didn't you learn?

No, Linux on an ARM, but the real problem is that it's wireless.


Best regards,
Spehro Pefhany

 

[Pooh Bear]

You need a cycle in the double-digit seconds to get enough temperature
delta for optimium thermal fatigue. In the early days, SSRs were dying
in two or three months from this cause (running 24/7).

How was the problem fixed ?

Graham

 

[Spehro Pefhany]

How was the problem fixed ?

Graham

AFAIUI, partly through better materials for the die attach and partly
through reduced expectations on the part of users.


Best regards,
Spehro Pefhany

 

[John Larkin]

John Larkin wrote...

Nice, but no software-programmable load-sharing constants,
because you didn't think of it soon enough, right?

Right. But I'd probably do that by fudging the source resistors, to
even out case temps under load. The uP doesn't control the signal
path, other than to shut it down.

John

 

[Winfield Hill]

John Larkin wrote...

Right. But I'd probably do that by fudging the source resistors,
to even out case temps under load. The uP doesn't control the
signal path, other than to shut it down.

Agreed, modeling/measuring the dissipation capabilities of each
heat-sink location is an obvious good idea, and the result can
be nicely "hardcoded" into the design with resistor values.
That's something that has less impact on manufacturing. But we
know it's not good to un-necessarily disturb a product flow and
documentation. Next time, 'eh John?

 

[Spehro Pefhany]

John Larkin wrote...

Agreed, modeling/measuring the dissipation capabilities of each
heat-sink location is an obvious good idea, and the result can
be nicely "hardcoded" into the design with resistor values.
That's something that has less impact on manufacturing. But we
know it's not good to un-necessarily disturb a product flow and
documentation. Next time, 'eh John?

Seems unnecessarily simplified. The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)



Best regards,
Spehro Pefhany

 

[Terry Given]

Seems unnecessarily simplified. The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)



Best regards,
Spehro Pefhany

And of course the production engineer hiding (sometimes extremely well)
within me doesnt want a plethora of differing source resistors, so s/w
control would be preferrable.

Cheers
Terry

 

[rickman]

I talked to one of the designers of the original circuit that I
couldn't post because it is an internal company design. I didn't get
much real info, but it looks like their unit was set up to provide a
lot more current than we need. So I can likely get by with just one
FET rather than using several in parallel. Regardless, I think this
circuit will be more of a cutoff than a clamp. Certainly a cutoff will
be simpler to make than a clamp which is essentially a regulator with a
low dropout when driven by a low voltage.

Tomorrow we will hear what the customer thinks about this. The whole
thing is currently up in the air because we signed up to meet one spec
and the ICD from the customer is calling out another, tougher spec.
Management wants to hit them up for more cash to meet the tougher
specs. With the easier specs we can just use Vicor units COTS with a
100 msec hold up circuit on the output... but that's another design
question.

My preference would be to design a switching regulator that will
operate between 16 and 100 VDC input. LTC has a part that may do the
job. But I am a novice at power designs only having done a couple of
lower power circuits using regulators with built in switches.

It certainly has been an interesting thread. I learned a lot about
power circuits that I had no idea I didn't know. Sometimes that is the
hard part, finding out what it is that you don't know, and usually you
find out the hard way.

 

[Fred Bartoli]

AFAIUI, partly through better materials for the die attach and partly
through reduced expectations on the part of users.

I remember a (I think Thomson CSF) databooks where there were two flavours
of the same die, one inteded for fast cycling and one for slow (mainly
on/off). The difference between both was the die attach solder material.

Never worked with these, (I'm too young but this stroke me.

 

[Fred Bartoli]

Seems unnecessarily simplified. The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)

Hey, we did that to squize the most performance out of DPAK/D2PAK MOSFETs
that were soldered on a thin stamped copper conductor-heatsink.
We did a good job of accurately modeling the transistors internals
(die-solder join-tab) so that we could accuratly predict the die temperature
under transients and fault conditions. The purpose was to use the smallest
die (100000s units a year with about 10 MOSFETS per unit).

 

[Jim Thompson]

On Tue, 17 Jan 2006 22:16:58 -0500, Spehro Pefhany

[snip]

The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)

Best regards,
Spehro Pefhany

Which is why my regulators in the TOW missile use steel cases instead
of aluminum.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

It's what you learn after you know it all that counts.

 

[Derek Potter]

You need a cycle in the double-digit seconds to get enough temperature
delta for optimium thermal fatigue. In the early days, SSRs were dying
in two or three months from this cause (running 24/7).

It depends on the different thermal resistances especially that of the
heatsink. If you make sure the die is effectively mounted on solid
metal the time contant should be of the order of the diffusion time of
the lump, which should be ~ 1 second. I'll concede that to be a
reliable scientific statement I should change the scenario to slow
music at 60bpm and assume one major beat per bar. I also need to learn
to do arithmetic, which when done correctly then extends the life
estimate to 11 hrs. No doubt some manufacturers would be cock-a-hoop
to have achieved this 600 times improvement in reliability, but it's
still a bit on the low side for most consumer goods

I ran into this problem with hefty bipolar transistors running
electric wheelchair motors. I believe RCA changed the die mounting
and the problem went away. OTOH, I have successfully melted the
mounting material on TO3 (lidless!) MOSFETs and had perfectly good
devices when they cooled down. Perhaps a periodical cook-up to remount
and anneal the die is a good idea?

 

[John Larkin]

On Tue, 17 Jan 2006 22:16:58 -0500, Spehro Pefhany

[snip]

The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)

Best regards,
Spehro Pefhany

Which is why my regulators in the TOW missile use steel cases instead
of aluminum.

...Jim Thompson

Hmmm... phase change absorbs a lot of heat. Something that melts at,
say, 80C could heatsink a semiconductor pretty well, while it lasts.

John

 

[Jim Thompson]

On Tue, 17 Jan 2006 22:16:58 -0500, Spehro Pefhany

[snip]

The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)

Best regards,
Spehro Pefhany

Which is why my regulators in the TOW missile use steel cases instead
of aluminum.

...Jim Thompson

Hmmm... phase change absorbs a lot of heat. Something that melts at,
say, 80C could heatsink a semiconductor pretty well, while it lasts.

John

Problem in the TOW: Run time in seconds. No space for a finned
heatsink, let alone moving air. So you use mass to store the heat. A
sublimating sink is nice, but presents test and storage issues.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

It's what you learn after you know it all that counts.

 

[Terry Given]

On Tue, 17 Jan 2006 22:16:58 -0500, Spehro Pefhany

[snip]

The heat capacity is a different
matter than the steady-state dissipation. There should be a hard-coded
distribution profile that is also a function of time. ;-)

Best regards,
Spehro Pefhany

Which is why my regulators in the TOW missile use steel cases instead
of aluminum.

...Jim Thompson

Hmmm... phase change absorbs a lot of heat. Something that melts at,
say, 80C could heatsink a semiconductor pretty well, while it lasts.

John

you might be interested in this book:

Principles of Enhanced Heat Transfer, Webb & Kim, 1-59169-014-5

Cheers
Terry

 

[Winfield Hill]

Terry Given wrote...

you might be interested in this book:
Principles of Enhanced Heat Transfer, Webb & Kim, 1-59169-014-5

Anything especially pithy you can share with us?

 

[Terry Given]

Terry Given wrote...



Anything especially pithy you can share with us?

I havent bought it yet (US$170 - aargh), but I happened to spot a copy
at Auckland University Engineering Library a month or so back, and had a
quick shufti.

there is a lot of material on funny shaped [extrusions] to maximise
surface area etc. for both air- and liquid-cooled heatsinks (my
particular area of interest) - they both calculate and measure the
amount of funny, and have a whole bunch of useful formulae, charts etc.

there are also sections on some seriously fancy techniques, like bathing
hot bits with spray, (IIRC) phase change cooling, stuff like that.

I am at present trying to jack up some funding for a hefty piece of
power electronics, and when I do I'll order a copy. next time im in AK,
I plan to spend a good day or so having a more thorough squiz.

Cheers
Terry

NB: Shufti, squiz = antipodean slang for "look"

 

[Joseph2k]

Phil Allison wrote...

Right, using parts from the same batch (tube?), with
a carefully-determined selection test jig and setup.

Even still, there can be extreme variation over the surface of a wafer, the
only sure way is to test them both statically and dynamically. $$$$