# Very low frequency 100 microvolt/sec triangle ramp with adjustable limits and slope

P

#### Paul Keinanen

Jan 1, 1970
0
Who says you can only use one DAC? Use one for coarse and another for
vernier. Oh, now I've dropped the bag'o tricks and spilled it out

That would be nice, if the coarse DAC would have ideal voltage steps.

While you could use four serial (UART) ports to generate 3 bit PWM
each and after filtering, sum the currents with 512:64:8:1 ratios, I
very much doubt that you would get a monotonic 12 bit response, not at
least without tweaking those resistors on a case by case basis.

J

#### JosephKK

Jan 1, 1970
0
Ahh you'll never see this reply, but Thanks Joerg, that sound like a
nice trick to tuck away.

George H.

I have seen that for A/D and D/A converters since the late 1970s.
I suspect the idea came about from multispeed synchro systems, where
two synchros geared say 36 to 1 were both used to transmit position
information.

J

#### JosephKK

Jan 1, 1970
0
What I do is keep track of the LSBs below the ones that could be sent
the the DAC. These get added into the next value before preparing it
to go to the DAC. This pushes the noise up towards the Nyquist.

The "dither" is a simple -1,0,+1 cycle that is scaled to be just a
little
under 3 x LSB. It forces there to be some bits going into the "lost
bits"
logic even if the number happens to have all zeros below the point
where
it gets cut off for the DAC.
It does not have to be that simple.

J

#### Joerg

Jan 1, 1970
0
Paul said:
That would be nice, if the coarse DAC would have ideal voltage steps.

While you could use four serial (UART) ports to generate 3 bit PWM
each and after filtering, sum the currents with 512:64:8:1 ratios, I
very much doubt that you would get a monotonic 12 bit response, not at
least without tweaking those resistors on a case by case basis.

12bit? Easy. Seems like Steve will need a lot of more bits. The trick is
to PWM some stable reference voltage, not just take the 3.3V that comes
out the uC (could be noisy).

J

#### Joerg

Jan 1, 1970
0
When someone responds I'll see it

I have seen that for A/D and D/A converters since the late 1970s.
I suspect the idea came about from multispeed synchro systems, where
two synchros geared say 36 to 1 were both used to transmit position
information.

What I'll never understand is why this stuff is not taught at
universities. I've often seen situation where a freaking expensive DAC
had been used and then I replaced it with a cheapo dual, and once a guy
said "Now that's cheating!" after he lost a (beer) bet that it could be
done under five bucks

J

#### Joerg

Jan 1, 1970
0
MCU generated signals are terrible. In order to get high accuracy, you
have to re-reference and re-clock MCU generated PWM as well.

I found them to be quite ok as long as you don't do a whole of other
stuff with the uC, such as driving a large LCD.

B

#### Ban

Jan 1, 1970
0
Steve said:
Yes, it does seem that digital would be best for me. This design will
also be measuring current during the voltage scan using a computer
data acquisition card, so a card with a dac could be used to generate
the ramp. But the less expensive 16 bit dac cards do not allow their
reference and offset voltages to be set externally, so their range is
restricted to +/- 10 V which is 0.3 mV lsb. In practice, that may be
ok.

If you want to use a 16-bit D/A-card you can scale down the output to
100uV/step and filter it, so you get a smooth ramp. There will be a delay of
4s on the ramp an when it stops the last 250uV will settle assymptotically.
The opamp is a precision part and is stablr with any capacitive load. It can
source or sink up to 20mA and can be supplied by the reference Voltage, if
your 2nd channel on the D/A.card can output that much. otherwise use a
separate supply and take only the 10V reference voltage from that channel.
If you have the option of unipolar output, no reference voltage is needed.
The lowest reachable voltage with 100k load is +10mV, with 1k +600mV, if
that is too much you also will need a negative supply for the opamp. If you
need more output current, you can add a buffer like LT1010 (inside the
fb-loop)
Vrefo+10V
|
o----------------.
| |
.-. |
| | |
| |20k |
-10V...+10V '-' |
___ | |\|
DAC-IN o-|___|--o-o----o-------|+\
20k | | | >---o--o
| |220u .-|-/ |
.-. |+ | |/| |
| | === | | |
19k014| | /-\ | === |
'-' | | GND |
| | '--------'
=== === LTC1152
GND GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)

ciao Ban

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