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vhdl or verilog code for cache

venkatachalam

Sep 22, 2010
1
Joined
Sep 22, 2010
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hello, i am venkatachalam, i am doing project in ofdma communication,for energy efficient. just now start the project. i need verilog or vhdl code for cache memory that memory having 2 address banks that is odd & even address bank.pls help me.
 
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